From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Andreas Färber" <afaerber@suse.de>,
"Michael S. Tsirkin" <mst@redhat.com>
Subject: [Qemu-devel] [PATCH v2 0/8] x86: correctly implement soft reset
Date: Fri, 2 May 2014 16:33:14 +0200 [thread overview]
Message-ID: <1399041202-26184-1-git-send-email-pbonzini@redhat.com> (raw)
A repost of an old patch series, rebased and retested. Patches 3 to 5
are new, everything else already carries a Reviewed-by.
v1->v2: compile-tested on ARM (I also have had a /dev/kvm on my ARM board
for two hours now, but still no guest to try this on).
Paolo Bonzini (8):
kvm: reset state from the CPU's reset method
kvm: forward INIT signals coming from the chipset
target-i386: fix set of registers zeroed on reset
target-i386: preserve FPU and MSR state on INIT
apic: do not accept SIPI on the bootstrap processor
cpu: make CPU_INTERRUPT_RESET available on all targets
pc: port 92 reset requires a low->high transition
x86: correctly implement soft reset
cpu-exec.c | 23 ++++++++++---------
cpus.c | 9 ++++++++
hw/i386/pc.c | 6 +++--
hw/input/pckbd.c | 5 +++--
hw/intc/apic_common.c | 2 +-
hw/isa/lpc_ich9.c | 12 ++++++++--
hw/pci-host/piix.c | 8 +++++--
include/exec/cpu-all.h | 8 ++++---
include/sysemu/cpus.h | 1 +
include/sysemu/kvm.h | 2 --
kvm-all.c | 11 ---------
target-arm/cpu.c | 7 ++++++
target-arm/kvm32.c | 4 +---
target-arm/kvm64.c | 2 +-
target-arm/kvm_arm.h | 8 +++++++
target-i386/cpu.c | 11 +++++----
target-i386/cpu.h | 60 ++++++++++++++++++++++++++++++--------------------
target-i386/helper.c | 14 ++++++++++--
target-i386/kvm.c | 39 +++++++++++++++++++++-----------
target-i386/kvm_i386.h | 2 ++
target-ppc/cpu.h | 3 ---
target-ppc/kvm.c | 4 ----
target-s390x/cpu.c | 4 ++++
target-s390x/cpu.h | 5 +++++
target-s390x/kvm.c | 6 +++--
25 files changed, 165 insertions(+), 91 deletions(-)
--
1.8.3.1
next reply other threads:[~2014-05-02 14:33 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-02 14:33 Paolo Bonzini [this message]
2014-05-02 14:33 ` [Qemu-devel] [PATCH v2 1/8] kvm: reset state from the CPU's reset method Paolo Bonzini
2014-05-12 7:15 ` Andreas Färber
2014-05-02 14:33 ` [Qemu-devel] [PATCH v2 2/8] kvm: forward INIT signals coming from the chipset Paolo Bonzini
2014-05-12 7:59 ` Andreas Färber
2014-05-02 14:33 ` [Qemu-devel] [PATCH v2 3/8] target-i386: fix set of registers zeroed on reset Paolo Bonzini
2014-05-12 7:56 ` Andreas Färber
2014-05-02 14:33 ` [Qemu-devel] [PATCH v2 4/8] target-i386: preserve FPU and MSR state on INIT Paolo Bonzini
2014-05-12 7:23 ` Andreas Färber
2014-05-02 14:33 ` [Qemu-devel] [PATCH v2 5/8] apic: do not accept SIPI on the bootstrap processor Paolo Bonzini
2014-05-12 7:36 ` Andreas Färber
2014-05-02 14:33 ` [Qemu-devel] [PATCH v2 6/8] cpu: make CPU_INTERRUPT_RESET available on all targets Paolo Bonzini
2014-05-12 7:47 ` Andreas Färber
2014-05-12 9:41 ` Peter Maydell
2014-05-12 10:31 ` Paolo Bonzini
2014-05-23 17:59 ` Peter Maydell
2014-05-23 18:10 ` Paolo Bonzini
2014-05-24 8:30 ` Peter Maydell
2014-05-24 12:59 ` Paolo Bonzini
2014-05-24 15:54 ` Peter Maydell
2014-05-02 14:33 ` [Qemu-devel] [PATCH v2 7/8] pc: port 92 reset requires a low->high transition Paolo Bonzini
2014-05-12 7:48 ` Andreas Färber
2014-05-02 14:33 ` [Qemu-devel] [PATCH v2 8/8] x86: correctly implement soft reset Paolo Bonzini
2014-05-05 12:13 ` Michael S. Tsirkin
2014-05-12 7:53 ` Andreas Färber
2014-05-12 9:12 ` Paolo Bonzini
2014-05-05 12:11 ` [Qemu-devel] [PATCH v2 0/8] " Michael S. Tsirkin
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