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Date: Tue, 15 Nov 2016 05:48:34 -0500 (EST)
From: =?utf-8?Q?Marc-Andr=C3=A9?= Lureau <mlureau@redhat.com>
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Subject: Re: [Qemu-devel] [PATCH v2 1/2] ivshmem: fix misconfig of
 not_legacy_32bit
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To: Zhuangyanying <ann.zhuangyanying@huawei.com>
Cc: marcandre lureau <marcandre.lureau@redhat.com>, armbru@redhat.com, pbonzini@redhat.com, mst@redhat.com, arei gonglei <arei.gonglei@huawei.com>, qemu-devel@nongnu.org, qemu-stable@nongnu.org

Hi

----- Original Message -----
> From: ZhuangYanying <ann.zhuangyanying@huawei.com>
>=20
> After commit 5400c02, ivshmem_64bit renamed to not_legacy_32bit,
> and changed the implementation of this property.
> Then use64 =3D 1, ~PCI_BASE_ADDRESS_MEM_TYPE_64 (default for ivshmem),
> the actual use is the legacy model,
> can not support greater than or equal 1G mapping,
> which is the opposite of configuration requirements.
>=20
> Cc: qemu-stable@nongnu.org
> Signed-off-by: Zhuang Yanying <ann.zhuangyanying@huawei.com>
> Reviewed-by: Gonglei <arei.gonglei@huawei.com>

Reviewed-by: Marc-Andr=C3=A9 Lureau <marcandre.lureau@redhat.com>

> ---
>  hw/misc/ivshmem.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>=20
> diff --git a/hw/misc/ivshmem.c b/hw/misc/ivshmem.c
> index 230e51b..b897685 100644
> --- a/hw/misc/ivshmem.c
> +++ b/hw/misc/ivshmem.c
> @@ -858,7 +858,7 @@ static void ivshmem_common_realize(PCIDevice *dev, Er=
ror
> **errp)
>      pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY,
>                       &s->ivshmem_mmio);
> =20
> -    if (!s->not_legacy_32bit) {
> +    if (s->not_legacy_32bit) {
>          attr |=3D PCI_BASE_ADDRESS_MEM_TYPE_64;
>      }
> =20
> --
> 1.8.3.1
>=20
>=20
>=20