From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51925) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WhYYw-0000MV-QW for qemu-devel@nongnu.org; Tue, 06 May 2014 02:09:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WhYYq-0007y4-Qi for qemu-devel@nongnu.org; Tue, 06 May 2014 02:09:10 -0400 Received: from mail-qg0-x22b.google.com ([2607:f8b0:400d:c04::22b]:37322) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WhYYq-0007xq-LJ for qemu-devel@nongnu.org; Tue, 06 May 2014 02:09:04 -0400 Received: by mail-qg0-f43.google.com with SMTP id 63so3003379qgz.2 for ; Mon, 05 May 2014 23:09:03 -0700 (PDT) From: "Edgar E. Iglesias" Date: Tue, 6 May 2014 16:08:04 +1000 Message-Id: <1399356506-5609-1-git-send-email-edgar.iglesias@gmail.com> Subject: [Qemu-devel] [PATCH v1 00/22] target-arm: Preparations for A64 EL2 and 3 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, peter.maydell@linaro.org Cc: rob.herring@linaro.org, peter.crosthwaite@xilinx.com, john.williams@xilinx.com, alex.bennee@linaro.org, agraf@suse.de From: "Edgar E. Iglesias" Hi, I've been doing some work on modeling parts of EL2 and 3 + some of the system-wide virtualization features for ARMv8. A lot is missing but I've got a series with enough to for example run KVM A64 guests on top of EL3 firmware inside emulated QEMU A64 VMs. I'm working on cleaning things up and plan to send patches and publish things as I go. This series does a first round of preparations. Most of it has little or no user visible impact as the EL2 and 3 features remain disabled. For the arrayification of the various EL regs that do not exist for EL0, I've used index macros. I don't really have a preference here, so if you have better/less ugly ideas or preferences I'm happy to change the pattern (getters/setters or whatever). Happy to address any comments people may have. Cheers, Edgar Edgar E. Iglesias (22): target-arm: A64: Add friendly logging of PSTATE A and I flags target-arm: Make elr_el1 an array target-arm: Make esr_el1 an array target-arm: c12_vbar -> vbar_el[] target-arm: Add arm_el_to_mmu_idx() target-arm: Move get_mem_index to translate.h target-arm: A64: Add SP entries for EL2 and 3 target-arm: A64: Add ELR entries for EL2 and 3 target-arm: Add SPSR entries for EL2/HYP and EL3/MON target-arm: A64: Introduce arm64_banked_spsr_index() target-arm: Add a feature flag for EL2 target-arm: Add a feature flag for EL3 target-arm: Register EL2 versions of ELR and SPSR target-arm: Register EL3 versions of ELR and SPSR target-arm: A64: Forbid ERET to increase the EL target-arm: A64: Forbid ERET to unimplemented ELs target-arm: A64: Generalize ERET to various ELs target-arm: A64: Generalize update_spsel for the various ELs target-arm: Add storage for VBAR_EL2 and 3 target-arm: Make vbar_write writeback to any CPREG target-arm: A64: Register VBAR_EL2 target-arm: A64: Register VBAR_EL3 target-arm/cpu.h | 38 +++++++++++++++++++++----- target-arm/helper-a64.c | 15 ++++++----- target-arm/helper.c | 67 +++++++++++++++++++++++++++++++++++++++------- target-arm/internals.h | 25 ++++++++++++----- target-arm/kvm64.c | 4 +-- target-arm/machine.c | 12 ++++----- target-arm/op_helper.c | 19 ++++++++----- target-arm/translate-a64.c | 13 +++------ target-arm/translate.h | 5 ++++ 9 files changed, 145 insertions(+), 53 deletions(-) -- 1.8.3.2