From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56273) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WhYjl-0008UO-Py for qemu-devel@nongnu.org; Tue, 06 May 2014 02:20:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WhYjf-0004BP-Qq for qemu-devel@nongnu.org; Tue, 06 May 2014 02:20:21 -0400 Received: from mail-qc0-x22e.google.com ([2607:f8b0:400d:c01::22e]:35246) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WhYjf-0004AP-JZ for qemu-devel@nongnu.org; Tue, 06 May 2014 02:20:15 -0400 Received: by mail-qc0-f174.google.com with SMTP id x13so854248qcv.19 for ; Mon, 05 May 2014 23:20:15 -0700 (PDT) From: "Edgar E. Iglesias" Date: Tue, 6 May 2014 16:08:21 +1000 Message-Id: <1399356506-5609-18-git-send-email-edgar.iglesias@gmail.com> In-Reply-To: <1399356506-5609-1-git-send-email-edgar.iglesias@gmail.com> References: <1399356506-5609-1-git-send-email-edgar.iglesias@gmail.com> Subject: [Qemu-devel] [PATCH v1 17/22] target-arm: A64: Generalize ERET to various ELs List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, peter.maydell@linaro.org Cc: rob.herring@linaro.org, peter.crosthwaite@xilinx.com, john.williams@xilinx.com, alex.bennee@linaro.org, agraf@suse.de From: "Edgar E. Iglesias" Adds support for ERET to Aarch64 EL2 and 3. Signed-off-by: Edgar E. Iglesias --- target-arm/op_helper.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c index f1ae05e..8494f7f 100644 --- a/target-arm/op_helper.c +++ b/target-arm/op_helper.c @@ -386,13 +386,14 @@ void HELPER(msr_i_pstate)(CPUARMState *env, uint32_t op, uint32_t imm) void HELPER(exception_return)(CPUARMState *env) { - unsigned int spsr_idx = arm64_banked_spsr_index(1); - uint32_t spsr = env->banked_spsr[spsr_idx]; - int new_el, i; int cur_el = arm_current_pl(env); + unsigned int spsr_idx = arm64_banked_spsr_index(cur_el); + uint32_t spsr; + int new_el, i; + spsr = env->banked_spsr[spsr_idx]; if (env->pstate & PSTATE_SP) { - env->sp_el[1] = env->xregs[31]; + env->sp_el[cur_el] = env->xregs[31]; } else { env->sp_el[0] = env->xregs[31]; } @@ -428,7 +429,7 @@ void HELPER(exception_return)(CPUARMState *env) env->aarch64 = 1; pstate_write(env, spsr); env->xregs[31] = env->sp_el[new_el]; - env->pc = env->elr_el[ELR_EL_IDX(1)]; + env->pc = env->elr_el[ELR_EL_IDX(cur_el)]; } return; @@ -442,7 +443,7 @@ illegal_return: * no change to exception level, execution state or stack pointer */ env->pstate |= PSTATE_IL; - env->pc = env->elr_el[ELR_EL_IDX(1)]; + env->pc = env->elr_el[ELR_EL_IDX(cur_el)]; spsr &= PSTATE_NZCV | PSTATE_DAIF; spsr |= pstate_read(env) & ~(PSTATE_NZCV | PSTATE_DAIF); pstate_write(env, spsr); -- 1.8.3.2