From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40872) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WiPUv-0005rM-8H for qemu-devel@nongnu.org; Thu, 08 May 2014 10:40:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WiPUu-00052A-5J for qemu-devel@nongnu.org; Thu, 08 May 2014 10:40:33 -0400 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:48057) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WiPUt-0004zC-V3 for qemu-devel@nongnu.org; Thu, 08 May 2014 10:40:32 -0400 From: Peter Maydell Date: Thu, 8 May 2014 15:40:29 +0100 Message-Id: <1399560029-19007-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PATCH] target-arm/helper.c: Don't flush the TLB if SCTLR is rewritten unchanged List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Laurent Desnogues , patches@linaro.org Linux makes a habit of writing the same value to the SCTLR that it already holds. In a sample boot of the kernel to a shell prompt it wrote the SCTLR with the value it already held 325465 times, and wrote different values just 3 times. Skip flushing the TLB if the SCTLR value isn't actually being changed; this speeds up my sample boot by 3-5%. Reported-by: Laurent Desnogues Signed-off-by: Peter Maydell --- I believe there are kernel patches in the works to avoid being quite so profligate with SCTLR writes, but there are still a lot of older kernels out in the world, so this is worth having IMHO. target-arm/helper.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/target-arm/helper.c b/target-arm/helper.c index 3be917c..417161e 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2081,6 +2081,13 @@ static void sctlr_write(CPUARMState *env, const ARMCPRegInfo *ri, { ARMCPU *cpu = arm_env_get_cpu(env); + if (env->cp15.c1_sys == value) { + /* Skip the TLB flush if nothing actually changed; Linux likes + * to do a lot of pointless SCTLR writes. + */ + return; + } + env->cp15.c1_sys = value; /* ??? Lots of these bits are not implemented. */ /* This may enable/disable the MMU, so do a TLB flush. */ -- 1.9.2