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From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Cc: qemu-stable@nongnu.org, "Michael S. Tsirkin" <mst@redhat.com>
Subject: [Qemu-devel] [PULL 4/8] pci-assign: limit # of msix vectors
Date: Sat, 10 May 2014 08:50:48 +0200	[thread overview]
Message-ID: <1399704652-6827-5-git-send-email-pbonzini@redhat.com> (raw)
In-Reply-To: <1399704652-6827-1-git-send-email-pbonzini@redhat.com>

From: "Michael S. Tsirkin" <mst@redhat.com>

KVM only supports MSIX table size up to 256 vectors,
but some assigned devices support more vectors,
at the moment attempts to assign them fail with EINVAL.

Tweak the MSIX capability exposed to guest to limit table size
to a supported value.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Tested-by: Gonglei <arei.gonglei@huawei.com>
Cc: qemu-stable@nongnu.org
Acked-by: Alex Williamson <alex.williamson@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 hw/i386/kvm/pci-assign.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/hw/i386/kvm/pci-assign.c b/hw/i386/kvm/pci-assign.c
index 570333f..ca58508 100644
--- a/hw/i386/kvm/pci-assign.c
+++ b/hw/i386/kvm/pci-assign.c
@@ -1258,6 +1258,7 @@ static int assigned_device_pci_cap_init(PCIDevice *pci_dev)
     if (pos != 0 && kvm_device_msix_supported(kvm_state)) {
         int bar_nr;
         uint32_t msix_table_entry;
+        uint16_t msix_max;
 
         if (!check_irqchip_in_kernel()) {
             return -ENOTSUP;
@@ -1269,9 +1270,10 @@ static int assigned_device_pci_cap_init(PCIDevice *pci_dev)
         }
         pci_dev->msix_cap = pos;
 
-        pci_set_word(pci_dev->config + pos + PCI_MSIX_FLAGS,
-                     pci_get_word(pci_dev->config + pos + PCI_MSIX_FLAGS) &
-                     PCI_MSIX_FLAGS_QSIZE);
+        msix_max = (pci_get_word(pci_dev->config + pos + PCI_MSIX_FLAGS) &
+                    PCI_MSIX_FLAGS_QSIZE) + 1;
+        msix_max = MIN(msix_max, KVM_MAX_MSIX_PER_DEV);
+        pci_set_word(pci_dev->config + pos + PCI_MSIX_FLAGS, msix_max - 1);
 
         /* Only enable and function mask bits are writable */
         pci_set_word(pci_dev->wmask + pos + PCI_MSIX_FLAGS,
@@ -1281,9 +1283,7 @@ static int assigned_device_pci_cap_init(PCIDevice *pci_dev)
         bar_nr = msix_table_entry & PCI_MSIX_FLAGS_BIRMASK;
         msix_table_entry &= ~PCI_MSIX_FLAGS_BIRMASK;
         dev->msix_table_addr = pci_region[bar_nr].base_addr + msix_table_entry;
-        dev->msix_max = pci_get_word(pci_dev->config + pos + PCI_MSIX_FLAGS);
-        dev->msix_max &= PCI_MSIX_FLAGS_QSIZE;
-        dev->msix_max += 1;
+        dev->msix_max = msix_max;
     }
 
     /* Minimal PM support, nothing writable, device appears to NAK changes */
-- 
1.8.3.1

  parent reply	other threads:[~2014-05-10  6:51 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-05-10  6:50 [Qemu-devel] [PULL 0/8] KVM changes for 2014-05-08 Paolo Bonzini
2014-05-10  6:50 ` [Qemu-devel] [PULL 1/8] target-i386: Remove unused data from local array Paolo Bonzini
2014-05-10  6:50 ` [Qemu-devel] [PULL 2/8] kvm: add set_one_reg/get_one_reg helpers Paolo Bonzini
2014-05-10  6:50 ` [Qemu-devel] [PULL 3/8] pci-assign: Fix a bug when map MSI-X table memory failed Paolo Bonzini
2014-05-10  6:50 ` Paolo Bonzini [this message]
2014-05-10  6:50 ` [Qemu-devel] [PULL 5/8] target-i386: set eflags prior to calling svm_load_seg_cache() in svm_helper.c Paolo Bonzini
2014-05-10  6:50 ` [Qemu-devel] [PULL 6/8] target-i386: set eflags and cr0 prior to calling cpu_x86_load_seg_cache() in smm_helper.c Paolo Bonzini
2014-05-10  6:50 ` [Qemu-devel] [PULL 7/8] target-i386: set eflags prior to calling cpu_x86_load_seg_cache() in seg_helper.c Paolo Bonzini
2014-05-10  6:50 ` [Qemu-devel] [PULL 8/8] target-i386: the x86 CPL is stored in CS.selector - auto update hflags accordingly Paolo Bonzini
2014-05-13 10:31 ` [Qemu-devel] [PULL 0/8] KVM changes for 2014-05-08 Cornelia Huck
2014-05-13 11:13   ` Paolo Bonzini

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