From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50633) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wjwq2-0005Z8-T1 for qemu-devel@nongnu.org; Mon, 12 May 2014 16:28:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Wjwpw-0006u7-PN for qemu-devel@nongnu.org; Mon, 12 May 2014 16:28:42 -0400 Received: from mx1.redhat.com ([209.132.183.28]:10522) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wjwpw-0006u1-Ha for qemu-devel@nongnu.org; Mon, 12 May 2014 16:28:36 -0400 Message-ID: <1399926513.6734.123.camel@bling.home> From: Alex Williamson Date: Mon, 12 May 2014 14:28:33 -0600 In-Reply-To: <20140512200237.GA2418@electric-eye.fr.zoreil.com> References: <20140510230225.17688.6353.stgit@bling.home> <20140512200237.GA2418@electric-eye.fr.zoreil.com> Content-Type: text/plain; charset="UTF-8" Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] vfio-pci: Quirk RTL8168 NIC List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Francois Romieu Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org On Mon, 2014-05-12 at 22:02 +0200, Francois Romieu wrote: > Alex Williamson : > [...] > > device MSI will be blocked. The Linux driver doesn't make use of this > > window, so apparently it's not required to make use of MSI-X. This > > It does not really use MSI-X (no RSS). Oh right, I looked for code references to the register but didn't notice that Linux configures it for MSI, not MSI-X. In my brief testing I only saw that Windows generates interrupts on the first vector, so perhaps not much lost without the extra vectors. I guess it's this patch that proves that MSI-X can be configured without this backdoor then. Do you have any insight into why this exists? > > quirk makes the device work with the Windows driver that does use this > > window for MSI-X, but I certainly cannot recommend this device for > > assignment (the Windows 7 driver also constantly pokes PCI config > > space). > > Do you have some offsets for those ? I believe it was 0x80, which is 0x10 off from the PCIe capability, so the link control register. I don't seem to have a log, but I'll regenerate one tonight to get the exact sequence (the interface is in use right now). > > diff --git a/hw/misc/vfio.c b/hw/misc/vfio.c > > index 9cf5b84..c3d2f7a 100644 > > --- a/hw/misc/vfio.c > > +++ b/hw/misc/vfio.c > [...] > > + * "address latched" indicator. Bits 12:15 is a mask field, which we're > > + * going to ignore because we don't really know what it means and the MSI-X > > + * area always seems to be accessed with a full mask. > > s/seems to/should always/ > > Double word accesses requires the full mask. The MSIX area should be accessed > through double words. Good to know, I'll amend the comment. Thanks! Alex