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Thu, 4 Jul 2024 14:50:17 +0000 (GMT) Message-ID: <13b19a4859e25274d05663bc0ca05621c56af985.camel@linux.ibm.com> Subject: Re: [PATCH 0/2] target/arm: Fix unwind from dc zva and FEAT_MOPS From: Ilya Leoshkevich To: Richard Henderson , qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-ppc@nongnu.org, david@redhat.com, balaton@eik.bme.hu Date: Thu, 04 Jul 2024 16:50:17 +0200 In-Reply-To: <20240702234155.2106399-1-richard.henderson@linaro.org> References: <20240702234155.2106399-1-richard.henderson@linaro.org> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.50.4 (3.50.4-1.fc39) MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: PK1HpEFLX_gBm0BPdLMKMNrcWYQl-D8Y X-Proofpoint-ORIG-GUID: Cy5r1Ez5bgLcK3GtC22ihuODAxHZgPQ_ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-04_10,2024-07-03_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 adultscore=0 malwarescore=0 spamscore=0 bulkscore=0 mlxscore=0 lowpriorityscore=0 priorityscore=1501 mlxlogscore=572 phishscore=0 impostorscore=0 clxscore=1011 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2407040099 Received-SPF: pass client-ip=148.163.158.5; envelope-from=iii@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Tue, 2024-07-02 at 16:41 -0700, Richard Henderson wrote: > While looking into Zoltan's attempt to speed up ppc64 DCBZ > (data cache block set to zero), I wondered what AArch64 was > doing differently.=C2=A0 It turned out that Arm is the only user > of tlb_vaddr_to_host. >=20 > None of the code sequences in use between AArch64, Power64 and S390X > are 100% safe, with race conditions vs mmap et al, however, AArch64 > is the only one that will fail this single threaded test case.=C2=A0 Use > of these new functions fixes the race condition as well, though I > have not yet touched the other guests. >=20 > I thought about exposing accel/tcg/user-retaddr.h for direct use > from the targets, but perhaps these wrappers are cleaner.=C2=A0 RFC? >=20 >=20 > r~ >=20 >=20 > Richard Henderson (2): > =C2=A0 accel/tcg: Introduce memset_ra, memmove_ra > =C2=A0 target/arm: Use memset_ra, memmove_ra in helper-a64.c >=20 > =C2=A0include/exec/cpu_ldst.h=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0 | 40 ++++++++++++++++ > =C2=A0accel/tcg/user-exec.c=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 | 22 +++++++++ > =C2=A0target/arm/tcg/helper-a64.c=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0 | 10 ++-- > =C2=A0tests/tcg/multiarch/memset-fault.c | 77 > ++++++++++++++++++++++++++++++ > =C2=A04 files changed, 144 insertions(+), 5 deletions(-) > =C2=A0create mode 100644 tests/tcg/multiarch/memset-fault.c This sounds good to me. I haven't debugged it, but I wonder why doesn't s390x fail here. For XC with src =3D=3D dst, it does access_memset() -> do_access_memset() -> memset() without setting the RA. And I don't think that anything around it sets the RA either.