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([2602:47:d490:6901:b659:bbad:1a22:7ef9]) by smtp.gmail.com with ESMTPSA id b14-20020aa7870e000000b00686c77a2905sm11606773pfo.20.2023.08.02.19.00.31 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 02 Aug 2023 19:00:31 -0700 (PDT) Message-ID: <13b823f2-ab77-3456-1c00-bc9b8880327a@linaro.org> Date: Wed, 2 Aug 2023 19:00:29 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Subject: Re: [PATCH] target/m68k: Map FPU exceptions to FPSR register Content-Language: en-US To: Keith Packard , qemu-devel@nongnu.org Cc: Laurent Vivier References: <20230803005534.421387-1-keithp@keithp.com> From: Richard Henderson In-Reply-To: <20230803005534.421387-1-keithp@keithp.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::230; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x230.google.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.102, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 8/2/23 17:55, Keith Packard via wrote: > Add helpers for reading/writing the 68881 FPSR register so that > changes in floating point exception state can be seen by the > application. > > Signed-off-by: Keith Packard > --- > target/m68k/cpu.h | 2 ++ > target/m68k/fpu_helper.c | 72 ++++++++++++++++++++++++++++++++++++++++ > target/m68k/helper.c | 4 +-- > target/m68k/helper.h | 2 ++ > target/m68k/translate.c | 4 +-- > 5 files changed, 80 insertions(+), 4 deletions(-) Good catch. Mostly ok. > +static inline int cpu_m68k_exceptbits_from_host(int host_bits) ... > +static inline int cpu_m68k_exceptbits_to_host(int target_bits) No need for inline markers. > +uint32_t HELPER(get_fpsr)(CPUM68KState *env) > +{ > + int host_flags = get_float_exception_flags(&env->fp_status); > + int target_flags = cpu_m68k_exceptbits_from_host(host_flags); > + int except = (env->fpsr & ~(0xf8)) | target_flags; > + return except; > +} > + > +uint32_t cpu_m68k_get_fpsr(CPUM68KState *env) > +{ > + return HELPER(get_fpsr)(env); > +} In general it is bad form to call HELPER(foo) directly. In this case it doesn't hurt, but better form to reverse the implementations. > +void HELPER(set_fpsr)(CPUM68KState *env, uint32_t val) > +{ > + env->fpsr = val; > + > + int host_flags = cpu_m68k_exceptbits_to_host((int) env->fpsr); > + set_float_exception_flags(host_flags, &env->fp_status); > +} > + > +void cpu_m68k_set_fpsr(CPUM68KState *env, uint32_t val) > +{ > + return HELPER(set_fpsr)(env, val); > +} Likewise. What's missing is an update to vmstate, to make sure all the architectural bits are properly saved. Add env->fpsr = cpu_m68k_get_fpsr(env); to a (new) fpu_pre_save and cpu_m68k_set_fpsr(env, env->fpsr); to fpu_post_load in target/m68k/cpu.c. r~