From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2C9D2C02198 for ; Mon, 10 Feb 2025 13:13:51 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1thTas-0002yW-I3; Mon, 10 Feb 2025 08:12:58 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1thTaq-0002xY-Ad; Mon, 10 Feb 2025 08:12:56 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1thTao-0003Zs-4r; Mon, 10 Feb 2025 08:12:56 -0500 Received: from pps.filterd (m0353725.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 51A20ngW014156; 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Mon, 10 Feb 2025 13:12:49 GMT Received: from smtprelay07.dal12v.mail.ibm.com ([172.16.1.9]) by ppma12.dal12v.mail.ibm.com (PPS) with ESMTPS id 44phksejvs-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 10 Feb 2025 13:12:49 +0000 Received: from smtpav06.wdc07v.mail.ibm.com (smtpav06.wdc07v.mail.ibm.com [10.39.53.233]) by smtprelay07.dal12v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 51ADCm2u28836528 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 10 Feb 2025 13:12:48 GMT Received: from smtpav06.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 229655804E; Mon, 10 Feb 2025 13:12:48 +0000 (GMT) Received: from smtpav06.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D9BCC5803F; Mon, 10 Feb 2025 13:12:45 +0000 (GMT) Received: from [9.171.88.1] (unknown [9.171.88.1]) by smtpav06.wdc07v.mail.ibm.com (Postfix) with ESMTP; Mon, 10 Feb 2025 13:12:45 +0000 (GMT) Message-ID: <13cd0bc678f489ff26911362570efe1aca97a642.camel@linux.ibm.com> Subject: Re: [PATCH v4 1/2] s390x/pci: add support for guests that request direct mapping From: Niklas Schnelle To: Matthew Rosato , qemu-s390x@nongnu.org Cc: farman@linux.ibm.com, thuth@redhat.com, pasic@linux.ibm.com, borntraeger@linux.ibm.com, richard.henderson@linaro.org, david@redhat.com, iii@linux.ibm.com, clegoate@redhat.com, qemu-devel@nongnu.org Date: Mon, 10 Feb 2025 14:12:45 +0100 In-Reply-To: <20250207205613.474092-2-mjrosato@linux.ibm.com> References: <20250207205613.474092-1-mjrosato@linux.ibm.com> <20250207205613.474092-2-mjrosato@linux.ibm.com> Autocrypt: addr=schnelle@linux.ibm.com; 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charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.54.3 (3.54.3-1.fc41) MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: 3gwS6R_REo8w-lUg2jag8OV4k696YNze X-Proofpoint-ORIG-GUID: 3gwS6R_REo8w-lUg2jag8OV4k696YNze X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-10_07,2025-02-10_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 priorityscore=1501 mlxlogscore=999 clxscore=1015 impostorscore=0 spamscore=0 bulkscore=0 suspectscore=0 adultscore=0 malwarescore=0 mlxscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502100109 Received-SPF: pass client-ip=148.163.158.5; envelope-from=schnelle@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Fri, 2025-02-07 at 15:56 -0500, Matthew Rosato wrote: > When receiving a guest mpcifc(4) or mpcifc(6) instruction without the T > bit set, treat this as a request to perform direct mapping instead of > address translation. In order to facilitate this, pin the entirety of > guest memory into the host iommu. >=20 > Pinning for the direct mapping case is handled via vfio and its memory > listener. Additionally, ram discard settings are inherited from vfio: > coordinated discards (e.g. virtio-mem) are allowed while uncoordinated > discards (e.g. virtio-balloon) are disabled. >=20 > Subsequent guest DMA operations are all expected to be of the format > guest_phys+sdma, allowing them to be used as lookup into the host > iommu table. >=20 > Signed-off-by: Matthew Rosato > --- > hw/s390x/s390-pci-bus.c | 38 +++++++++++++++++++++++++++++++-- > hw/s390x/s390-pci-inst.c | 13 +++++++++-- > hw/s390x/s390-pci-vfio.c | 23 ++++++++++++++++---- > hw/s390x/s390-virtio-ccw.c | 5 +++++ > include/hw/s390x/s390-pci-bus.h | 4 ++++ > 5 files changed, 75 insertions(+), 8 deletions(-) >=20 >=20 ---8<--- > =20 > static const VMStateDescription s390_pci_device_vmstate =3D { > diff --git a/hw/s390x/s390-pci-inst.c b/hw/s390x/s390-pci-inst.c > index e386d75d58..8cdeb6cb7f 100644 > --- a/hw/s390x/s390-pci-inst.c > +++ b/hw/s390x/s390-pci-inst.c > @@ -16,6 +16,7 @@ > #include "exec/memory.h" > #include "qemu/error-report.h" > #include "system/hw_accel.h" > +#include "hw/boards.h" > #include "hw/pci/pci_device.h" > #include "hw/s390x/s390-pci-inst.h" > #include "hw/s390x/s390-pci-bus.h" > @@ -1008,17 +1009,25 @@ static int reg_ioat(CPUS390XState *env, S390PCIBu= sDevice *pbdev, ZpciFib fib, > } > =20 > /* currently we only support designation type 1 with translation */ > - if (!(dt =3D=3D ZPCI_IOTA_RTTO && t)) { > + if (t && dt !=3D ZPCI_IOTA_RTTO) { > error_report("unsupported ioat dt %d t %d", dt, t); > s390_program_interrupt(env, PGM_OPERAND, ra); > return -EINVAL; > + } else if (!t && !pbdev->rtr_avail) { > + error_report("relaxed translation not allowed"); > + s390_program_interrupt(env, PGM_OPERAND, ra); > + return -EINVAL; > } > =20 > iommu->pba =3D pba; > iommu->pal =3D pal; > iommu->g_iota =3D g_iota; > =20 > - s390_pci_iommu_enable(iommu); > + if (t) { > + s390_pci_iommu_enable(iommu); > + } else { > + s390_pci_iommu_direct_map_enable(iommu); > + } > =20 > return 0; > } > diff --git a/hw/s390x/s390-pci-vfio.c b/hw/s390x/s390-pci-vfio.c > index 7dbbc76823..443e222912 100644 > --- a/hw/s390x/s390-pci-vfio.c > +++ b/hw/s390x/s390-pci-vfio.c > @@ -131,13 +131,28 @@ static void s390_pci_read_base(S390PCIBusDevice *pb= dev, > /* Store function type separately for type-specific behavior */ > pbdev->pft =3D cap->pft; > =20 > + /* > + * If the device is a passthrough ISM device, disallow relaxed > + * translation. > + */ > + if (pbdev->pft =3D=3D ZPCI_PFT_ISM) { > + pbdev->rtr_avail =3D false; > + } Just a note for external readers. The ISM device does work without the above but having explicit guest IOMMU mappings plus the respective shadow mappings in the host would catch driver misbehavior more easily. At the same time ISM uses long lived IOMMU mappings so the cost of shadowing its mappings is low. > + > /* > * If appropriate, reduce the size of the supported DMA aperture rep= orted > - * to the guest based upon the vfio DMA limit. > + * to the guest based upon the vfio DMA limit. This is applicable f= or > + * devices that are guaranteed to not use relaxed translation. If t= he > + * device is capable of relaxed translation then we must advertise t= he > + * full aperture. In this case, if translation is used then we will > + * rely on the vfio DMA limit counting and use RPCIT CC1 / status 16 > + * to request that the guest free DMA mappings as necessary. > */ > - vfio_size =3D pbdev->iommu->max_dma_limit << TARGET_PAGE_BITS; > - if (vfio_size > 0 && vfio_size < cap->end_dma - cap->start_dma + 1) = { > - pbdev->zpci_fn.edma =3D cap->start_dma + vfio_size - 1; > + if (!pbdev->rtr_avail) { > + vfio_size =3D pbdev->iommu->max_dma_limit << TARGET_PAGE_BITS; > + if (vfio_size > 0 && vfio_size < cap->end_dma - cap->start_dma += 1) { > + pbdev->zpci_fn.edma =3D cap->start_dma + vfio_size - 1; > + } > } > } > =20 > diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c > index d9e683c5b4..6a6cb39808 100644 > --- a/hw/s390x/s390-virtio-ccw.c > +++ b/hw/s390x/s390-virtio-ccw.c > @@ -937,8 +937,13 @@ static void ccw_machine_9_2_instance_options(Machine= State *machine) > =20 > static void ccw_machine_9_2_class_options(MachineClass *mc) > { > + static GlobalProperty compat[] =3D { > + { TYPE_S390_PCI_DEVICE, "relaxed-translation", "off", }, > + }; > + > ccw_machine_10_0_class_options(mc); > compat_props_add(mc->compat_props, hw_compat_9_2, hw_compat_9_2_len)= ; > + compat_props_add(mc->compat_props, compat, G_N_ELEMENTS(compat)); > } > DEFINE_CCW_MACHINE(9, 2); > =20 > diff --git a/include/hw/s390x/s390-pci-bus.h b/include/hw/s390x/s390-pci-= bus.h > index 2c43ea123f..ea9e04ec49 100644 > --- a/include/hw/s390x/s390-pci-bus.h > +++ b/include/hw/s390x/s390-pci-bus.h > @@ -277,7 +277,9 @@ struct S390PCIIOMMU { > AddressSpace as; > MemoryRegion mr; > IOMMUMemoryRegion iommu_mr; > + MemoryRegion dm_mr; > bool enabled; > + bool direct_map; > uint64_t g_iota; > uint64_t pba; > uint64_t pal; > @@ -362,6 +364,7 @@ struct S390PCIBusDevice { > bool interp; > bool forwarding_assist; > bool aif; > + bool rtr_avail; > QTAILQ_ENTRY(S390PCIBusDevice) link; > }; > =20 > @@ -389,6 +392,7 @@ int pci_chsc_sei_nt2_have_event(void); > void s390_pci_sclp_configure(SCCB *sccb); > void s390_pci_sclp_deconfigure(SCCB *sccb); > void s390_pci_iommu_enable(S390PCIIOMMU *iommu); > +void s390_pci_iommu_direct_map_enable(S390PCIIOMMU *iommu); > void s390_pci_iommu_disable(S390PCIIOMMU *iommu); > void s390_pci_generate_error_event(uint16_t pec, uint32_t fh, uint32_t f= id, > uint64_t faddr, uint32_t e); I'm not too familiar with the existing code or QEMU in general, but the changes makes sense to me. I'm assuming the braces around single statement bodies are accepted style in QEMU? I retested this version together with the v4 of the kernel version too. So feel free to add: Tested-by: Niklas Schnelle Reviewed-by: Niklas Schnelle