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From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: aurelien@aurel32.net
Subject: [Qemu-devel] [PATCH 19/24] tcg-mips: Simplify brcond
Date: Wed, 14 May 2014 00:17:36 -0700	[thread overview]
Message-ID: <1400051861-5848-20-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1400051861-5848-1-git-send-email-rth@twiddle.net>

Use the same table to fold comparisons as with setcond.

Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 tcg/mips/tcg-target.c | 87 ++++++++++++++++++++++++---------------------------
 1 file changed, 41 insertions(+), 46 deletions(-)

diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c
index 278925c..c0a7a04 100644
--- a/tcg/mips/tcg-target.c
+++ b/tcg/mips/tcg-target.c
@@ -634,70 +634,65 @@ static void tcg_out_setcond(TCGContext *s, TCGCond cond, TCGReg ret,
      }
 }
 
-static void tcg_out_brcond(TCGContext *s, TCGCond cond, TCGArg arg1,
-                           TCGArg arg2, int label_index)
+static void tcg_out_brcond(TCGContext *s, TCGCond cond, TCGReg arg1,
+                           TCGReg arg2, int label_index)
 {
-    TCGLabel *l = &s->labels[label_index];
+    static const MIPSInsn b_zero[16] = {
+        [TCG_COND_LT] = OPC_BLTZ,
+        [TCG_COND_GT] = OPC_BGTZ,
+        [TCG_COND_LE] = OPC_BLEZ,
+        [TCG_COND_GE] = OPC_BGEZ,
+    };
+
+    TCGLabel *l;
+    MIPSInsn s_opc = OPC_SLTU;
+    MIPSInsn b_opc;
+    int cmp_map;
 
     switch (cond) {
     case TCG_COND_EQ:
-        tcg_out_opc_br(s, OPC_BEQ, arg1, arg2);
+        b_opc = OPC_BEQ;
         break;
     case TCG_COND_NE:
-        tcg_out_opc_br(s, OPC_BNE, arg1, arg2);
+        b_opc = OPC_BNE;
         break;
+
     case TCG_COND_LT:
-        if (arg2 == 0) {
-            tcg_out_opc_br(s, OPC_BLTZ, 0, arg1);
-        } else {
-            tcg_out_opc_reg(s, OPC_SLT, TCG_TMP0, arg1, arg2);
-            tcg_out_opc_br(s, OPC_BNE, TCG_TMP0, TCG_REG_ZERO);
-        }
-        break;
-    case TCG_COND_LTU:
-        tcg_out_opc_reg(s, OPC_SLTU, TCG_TMP0, arg1, arg2);
-        tcg_out_opc_br(s, OPC_BNE, TCG_TMP0, TCG_REG_ZERO);
-        break;
-    case TCG_COND_GE:
-        if (arg2 == 0) {
-            tcg_out_opc_br(s, OPC_BGEZ, 0, arg1);
-        } else {
-            tcg_out_opc_reg(s, OPC_SLT, TCG_TMP0, arg1, arg2);
-            tcg_out_opc_br(s, OPC_BEQ, TCG_TMP0, TCG_REG_ZERO);
-        }
-        break;
-    case TCG_COND_GEU:
-        tcg_out_opc_reg(s, OPC_SLTU, TCG_TMP0, arg1, arg2);
-        tcg_out_opc_br(s, OPC_BEQ, TCG_TMP0, TCG_REG_ZERO);
-        break;
+    case TCG_COND_GT:
     case TCG_COND_LE:
+    case TCG_COND_GE:
         if (arg2 == 0) {
-            tcg_out_opc_br(s, OPC_BLEZ, 0, arg1);
-        } else {
-            tcg_out_opc_reg(s, OPC_SLT, TCG_TMP0, arg2, arg1);
-            tcg_out_opc_br(s, OPC_BEQ, TCG_TMP0, TCG_REG_ZERO);
+            b_opc = b_zero[cond];
+            arg2 = arg1;
+            arg1 = 0;
+            break;
         }
-        break;
+        s_opc = OPC_SLT;
+        /* FALLTHRU */
+
+    case TCG_COND_LTU:
+    case TCG_COND_GTU:
     case TCG_COND_LEU:
-        tcg_out_opc_reg(s, OPC_SLTU, TCG_TMP0, arg2, arg1);
-        tcg_out_opc_br(s, OPC_BEQ, TCG_TMP0, TCG_REG_ZERO);
-        break;
-    case TCG_COND_GT:
-        if (arg2 == 0) {
-            tcg_out_opc_br(s, OPC_BGTZ, 0, arg1);
-        } else {
-            tcg_out_opc_reg(s, OPC_SLT, TCG_TMP0, arg2, arg1);
-            tcg_out_opc_br(s, OPC_BNE, TCG_TMP0, TCG_REG_ZERO);
+    case TCG_COND_GEU:
+        cmp_map = mips_cmp_map[cond];
+        if (cmp_map & MIPS_CMP_SWAP) {
+            TCGReg t = arg1;
+            arg1 = arg2;
+            arg2 = t;
         }
+        tcg_out_opc_reg(s, s_opc, TCG_TMP0, arg1, arg2);
+        b_opc = (cmp_map & MIPS_CMP_INV ? OPC_BEQ : OPC_BNE);
+        arg1 = TCG_TMP0;
+        arg2 = TCG_REG_ZERO;
         break;
-    case TCG_COND_GTU:
-        tcg_out_opc_reg(s, OPC_SLTU, TCG_TMP0, arg2, arg1);
-        tcg_out_opc_br(s, OPC_BNE, TCG_TMP0, TCG_REG_ZERO);
-        break;
+
     default:
         tcg_abort();
         break;
     }
+
+    tcg_out_opc_br(s, b_opc, arg1, arg2);
+    l = &s->labels[label_index];
     if (l->has_value) {
         reloc_pc16(s->code_ptr - 1, l->u.value_ptr);
     } else {
-- 
1.9.0

  parent reply	other threads:[~2014-05-14  7:18 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-05-14  7:17 [Qemu-devel] [PATCH 00/24] tcg mips updates Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 01/24] tcg-mips: Layout executable and code_gen_buffer Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 02/24] tcg-mips: Constrain the code_gen_buffer to be within one 256mb segment Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 03/24] tcg-mips: Use J and JAL opcodes Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 04/24] tcg-mips: Fill the exit_tb delay slot Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 05/24] tcg-mips: Split large ldst offsets Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 06/24] tcg-mips: Move softmmu slow path out of line Richard Henderson
2014-05-24  9:55   ` Paolo Bonzini
2014-05-24 15:42     ` Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 07/24] tcg-mips: Convert to new qemu_l/st helpers Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 08/24] tcg-mips: Convert to new_ldst Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 09/24] tcg-mips: Rearrange register allocation Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 10/24] tcg-mips: Introduce TCG_TMP0, TCG_TMP1 Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 11/24] tcg-mips: Use T9 for TCG_TMP1 Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 12/24] tcg-mips: Use EXT for AND on mips32r2 Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 13/24] tcg-mips: Name the opcode enumeration Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 14/24] tcg-mips: Fix subtract immediate range Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 15/24] tcg-mips: Hoist args loads Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 16/24] tcg-mips: Improve add2/sub2 Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 17/24] tcg-mips: Commonize opcode implementations Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 18/24] tcg-mips: Simplify setcond Richard Henderson
2014-05-14  7:17 ` Richard Henderson [this message]
2014-05-14  7:17 ` [Qemu-devel] [PATCH 20/24] tcg-mips: Simplify setcond2 Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 21/24] tcg-mips: Improve setcond eq/ne vs zeros Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 22/24] tcg-mips: Simplify brcond2 Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 23/24] tcg-mips: Simplify movcond Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 24/24] tcg-mips: Enable direct chaining of TBs Richard Henderson
2014-05-23 19:15 ` [Qemu-devel] [PATCH 00/24] tcg mips updates Richard Henderson
2014-05-23 19:47   ` Paolo Bonzini
2014-05-24 10:06   ` Paolo Bonzini

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