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From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: aurelien@aurel32.net
Subject: [Qemu-devel] [PATCH 20/24] tcg-mips: Simplify setcond2
Date: Wed, 14 May 2014 00:17:37 -0700	[thread overview]
Message-ID: <1400051861-5848-21-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1400051861-5848-1-git-send-email-rth@twiddle.net>

Using tcg_unsigned_cond and tcg_high_cond.
Also, move the function up in the file for future cleanups.

Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 tcg/mips/tcg-target.c | 95 +++++++++++++++++----------------------------------
 1 file changed, 31 insertions(+), 64 deletions(-)

diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c
index c0a7a04..1429ec7 100644
--- a/tcg/mips/tcg-target.c
+++ b/tcg/mips/tcg-target.c
@@ -701,6 +701,37 @@ static void tcg_out_brcond(TCGContext *s, TCGCond cond, TCGReg arg1,
     tcg_out_nop(s);
 }
 
+static void tcg_out_setcond2(TCGContext *s, TCGCond cond, TCGReg ret,
+                             TCGReg al, TCGReg ah, TCGReg bl, TCGReg bh)
+{
+    TCGReg tmp0 = TCG_TMP0;
+    TCGReg tmp1 = ret;
+
+    assert(ret != TCG_TMP0);
+    if (ret == ah || ret == bh) {
+        assert(ret != TCG_TMP1);
+        tmp1 = TCG_TMP1;
+    }
+
+    switch (cond) {
+    case TCG_COND_EQ:
+    case TCG_COND_NE:
+        tcg_out_setcond(s, cond, tmp0, ah, bh);
+        tcg_out_setcond(s, cond, ret, al, bl);
+        tcg_out_opc_reg(s, (cond == TCG_COND_EQ ? OPC_AND : OPC_OR),
+                        ret, ret, tmp0);
+        break;
+
+    default:
+        tcg_out_setcond(s, TCG_COND_EQ, tmp0, ah, bh);
+        tcg_out_setcond(s, tcg_unsigned_cond(cond), tmp1, al, bl);
+        tcg_out_opc_reg(s, OPC_AND, tmp1, tmp1, tmp0);
+        tcg_out_setcond(s, tcg_high_cond(cond), tmp0, ah, bh);
+        tcg_out_opc_reg(s, OPC_OR, ret, tmp1, tmp0);
+        break;
+    }
+}
+
 /* XXX: we implement it at the target level to avoid having to
    handle cross basic blocks temporaries */
 static void tcg_out_brcond2(TCGContext *s, TCGCond cond, TCGArg arg1,
@@ -829,70 +860,6 @@ static void tcg_out_movcond(TCGContext *s, TCGCond cond, TCGReg ret,
     }
 }
 
-/* XXX: we implement it at the target level to avoid having to
-   handle cross basic blocks temporaries */
-static void tcg_out_setcond2(TCGContext *s, TCGCond cond, TCGReg ret,
-                             TCGArg arg1, TCGArg arg2, TCGArg arg3, TCGArg arg4)
-{
-    switch (cond) {
-    case TCG_COND_EQ:
-        tcg_out_setcond(s, TCG_COND_EQ, TCG_TMP0, arg2, arg4);
-        tcg_out_setcond(s, TCG_COND_EQ, TCG_TMP1, arg1, arg3);
-        tcg_out_opc_reg(s, OPC_AND, ret, TCG_TMP0, TCG_TMP1);
-        return;
-    case TCG_COND_NE:
-        tcg_out_setcond(s, TCG_COND_NE, TCG_TMP0, arg2, arg4);
-        tcg_out_setcond(s, TCG_COND_NE, TCG_TMP1, arg1, arg3);
-        tcg_out_opc_reg(s, OPC_OR, ret, TCG_TMP0, TCG_TMP1);
-        return;
-    case TCG_COND_LT:
-    case TCG_COND_LE:
-        tcg_out_setcond(s, TCG_COND_LT, TCG_TMP0, arg2, arg4);
-        break;
-    case TCG_COND_GT:
-    case TCG_COND_GE:
-        tcg_out_setcond(s, TCG_COND_GT, TCG_TMP0, arg2, arg4);
-        break;
-    case TCG_COND_LTU:
-    case TCG_COND_LEU:
-        tcg_out_setcond(s, TCG_COND_LTU, TCG_TMP0, arg2, arg4);
-        break;
-    case TCG_COND_GTU:
-    case TCG_COND_GEU:
-        tcg_out_setcond(s, TCG_COND_GTU, TCG_TMP0, arg2, arg4);
-        break;
-    default:
-        tcg_abort();
-        break;
-    }
-
-    tcg_out_setcond(s, TCG_COND_EQ, TCG_TMP1, arg2, arg4);
-
-    switch(cond) {
-    case TCG_COND_LT:
-    case TCG_COND_LTU:
-        tcg_out_setcond(s, TCG_COND_LTU, ret, arg1, arg3);
-        break;
-    case TCG_COND_LE:
-    case TCG_COND_LEU:
-        tcg_out_setcond(s, TCG_COND_LEU, ret, arg1, arg3);
-        break;
-    case TCG_COND_GT:
-    case TCG_COND_GTU:
-        tcg_out_setcond(s, TCG_COND_GTU, ret, arg1, arg3);
-        break;
-    case TCG_COND_GE:
-    case TCG_COND_GEU:
-        tcg_out_setcond(s, TCG_COND_GEU, ret, arg1, arg3);
-        break;
-    default:
-        tcg_abort();
-    }
-
-    tcg_out_opc_reg(s, OPC_AND, ret, ret, TCG_TMP1);
-    tcg_out_opc_reg(s, OPC_OR, ret, ret, TCG_TMP0);
-}
-
 static void tcg_out_call_int(TCGContext *s, tcg_insn_unit *arg, bool tail)
 {
     /* Note that the ABI requires the called function's address to be
-- 
1.9.0

  parent reply	other threads:[~2014-05-14  7:18 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-05-14  7:17 [Qemu-devel] [PATCH 00/24] tcg mips updates Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 01/24] tcg-mips: Layout executable and code_gen_buffer Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 02/24] tcg-mips: Constrain the code_gen_buffer to be within one 256mb segment Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 03/24] tcg-mips: Use J and JAL opcodes Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 04/24] tcg-mips: Fill the exit_tb delay slot Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 05/24] tcg-mips: Split large ldst offsets Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 06/24] tcg-mips: Move softmmu slow path out of line Richard Henderson
2014-05-24  9:55   ` Paolo Bonzini
2014-05-24 15:42     ` Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 07/24] tcg-mips: Convert to new qemu_l/st helpers Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 08/24] tcg-mips: Convert to new_ldst Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 09/24] tcg-mips: Rearrange register allocation Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 10/24] tcg-mips: Introduce TCG_TMP0, TCG_TMP1 Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 11/24] tcg-mips: Use T9 for TCG_TMP1 Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 12/24] tcg-mips: Use EXT for AND on mips32r2 Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 13/24] tcg-mips: Name the opcode enumeration Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 14/24] tcg-mips: Fix subtract immediate range Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 15/24] tcg-mips: Hoist args loads Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 16/24] tcg-mips: Improve add2/sub2 Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 17/24] tcg-mips: Commonize opcode implementations Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 18/24] tcg-mips: Simplify setcond Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 19/24] tcg-mips: Simplify brcond Richard Henderson
2014-05-14  7:17 ` Richard Henderson [this message]
2014-05-14  7:17 ` [Qemu-devel] [PATCH 21/24] tcg-mips: Improve setcond eq/ne vs zeros Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 22/24] tcg-mips: Simplify brcond2 Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 23/24] tcg-mips: Simplify movcond Richard Henderson
2014-05-14  7:17 ` [Qemu-devel] [PATCH 24/24] tcg-mips: Enable direct chaining of TBs Richard Henderson
2014-05-23 19:15 ` [Qemu-devel] [PATCH 00/24] tcg mips updates Richard Henderson
2014-05-23 19:47   ` Paolo Bonzini
2014-05-24 10:06   ` Paolo Bonzini

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