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From: Alexander Graf <agraf@suse.de>
To: qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org
Subject: [Qemu-devel] [PATCH 6/9] PPC: Add dcbtls emulation
Date: Thu, 15 May 2014 18:32:47 +0200	[thread overview]
Message-ID: <1400171570-21284-7-git-send-email-agraf@suse.de> (raw)
In-Reply-To: <1400171570-21284-1-git-send-email-agraf@suse.de>

The dcbtls instruction is able to lock data inside the L1 cache.

Unfortunately we don't emulate any caches, so we have to tell the guest
that its locking attempt failed.

However, by implementing the instruction we at least don't give the
guest a program exception which it definitely does not expect.

Signed-off-by: Alexander Graf <agraf@suse.de>
---
 target-ppc/translate.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index e9e7812..0cf1417 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -4481,6 +4481,17 @@ static void gen_dcbtst(DisasContext *ctx)
      */
 }
 
+/* dcbtls */
+static void gen_dcbtls(DisasContext *ctx)
+{
+    /* Always fails locking the cache */
+    TCGv t0 = tcg_temp_new();
+    gen_load_spr(t0, SPR_Exxx_L1CSR0);
+    tcg_gen_ori_tl(t0, t0, L1CSR0_CUL);
+    gen_store_spr(SPR_Exxx_L1CSR0, t0);
+    tcg_temp_free(t0);
+}
+
 /* dcbz */
 static void gen_dcbz(DisasContext *ctx)
 {
@@ -10215,6 +10226,7 @@ GEN_HANDLER(dcbi, 0x1F, 0x16, 0x0E, 0x03E00001, PPC_CACHE),
 GEN_HANDLER(dcbst, 0x1F, 0x16, 0x01, 0x03E00001, PPC_CACHE),
 GEN_HANDLER(dcbt, 0x1F, 0x16, 0x08, 0x00000001, PPC_CACHE),
 GEN_HANDLER(dcbtst, 0x1F, 0x16, 0x07, 0x00000001, PPC_CACHE),
+GEN_HANDLER_E(dcbtls, 0x1F, 0x06, 0x05, 0x02000001, PPC_BOOKE, PPC2_BOOKE206),
 GEN_HANDLER(dcbz, 0x1F, 0x16, 0x1F, 0x03C00001, PPC_CACHE_DCBZ),
 GEN_HANDLER(dst, 0x1F, 0x16, 0x0A, 0x01800001, PPC_ALTIVEC),
 GEN_HANDLER(dstst, 0x1F, 0x16, 0x0B, 0x02000001, PPC_ALTIVEC),
-- 
1.8.1.4

  parent reply	other threads:[~2014-05-15 16:33 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-05-15 16:32 [Qemu-devel] [PATCH 0/9] PPC: e500: Use u-boot as firmware Alexander Graf
2014-05-15 16:32 ` [Qemu-devel] [PATCH 1/9] PPC: Make all e500 CPUs SVR aware Alexander Graf
2014-05-15 16:32 ` [Qemu-devel] [PATCH 2/9] PPC: Add definitions for GIVORs Alexander Graf
2014-05-15 16:32 ` [Qemu-devel] [PATCH 3/9] PPC: Fix SPR access control of L1CFG0 Alexander Graf
2014-05-15 16:32 ` [Qemu-devel] [PATCH 4/9] PPC: Add L1CFG1 SPR emulation Alexander Graf
2014-05-15 16:32 ` [Qemu-devel] [PATCH 5/9] PPC: Properly emulate L1CSR0 and L1CSR1 Alexander Graf
2014-05-15 16:32 ` Alexander Graf [this message]
2014-05-15 16:32 ` [Qemu-devel] [PATCH 7/9] PPC: e500: Expose kernel load address in dt Alexander Graf
2014-05-15 16:32 ` [Qemu-devel] [PATCH 8/9] PPC: Add u-boot firmware for e500 Alexander Graf
2014-05-16  6:06   ` Gerd Hoffmann
2014-05-16 11:09     ` Alexander Graf
2014-05-16 13:11       ` Gerd Hoffmann
2014-05-16 13:43         ` Alexander Graf
2014-05-16 14:08           ` Gerd Hoffmann
2014-05-16 14:21             ` Alexander Graf
2014-05-15 16:32 ` [Qemu-devel] [PATCH 9/9] PPC: e500: Move to u-boot as firmware Alexander Graf
2014-05-15 16:38 ` [Qemu-devel] [Qemu-ppc] [PATCH 0/9] PPC: e500: Use " Alexander Graf

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