From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39476) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WmJq6-0006pk-H1 for qemu-devel@nongnu.org; Mon, 19 May 2014 05:26:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WmJq0-0005vt-F0 for qemu-devel@nongnu.org; Mon, 19 May 2014 05:26:34 -0400 Received: from mail-yk0-x232.google.com ([2607:f8b0:4002:c07::232]:42418) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WmJq0-0005uu-Bv for qemu-devel@nongnu.org; Mon, 19 May 2014 05:26:28 -0400 Received: by mail-yk0-f178.google.com with SMTP id 20so4294079yks.9 for ; Mon, 19 May 2014 02:26:28 -0700 (PDT) From: "Edgar E. Iglesias" Date: Mon, 19 May 2014 19:22:45 +1000 Message-Id: <1400491383-6725-5-git-send-email-edgar.iglesias@gmail.com> In-Reply-To: <1400491383-6725-1-git-send-email-edgar.iglesias@gmail.com> References: <1400491383-6725-1-git-send-email-edgar.iglesias@gmail.com> Subject: [Qemu-devel] [PATCH v3 04/22] target-arm: Add arm_el_to_mmu_idx() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, peter.maydell@linaro.org Cc: rob.herring@linaro.org, peter.crosthwaite@xilinx.com, aggelerf@ethz.ch, agraf@suse.de, john.williams@xilinx.com, alex.bennee@linaro.org, christoffer.dall@linaro.org, rth@twiddle.net From: "Edgar E. Iglesias" Maps a given EL to the corresponding MMU index. Reviewed-by: Peter Crosthwaite Signed-off-by: Edgar E. Iglesias --- target-arm/cpu.h | 22 +++++++++++++++++++++- target-arm/translate-a64.c | 8 ++------ 2 files changed, 23 insertions(+), 7 deletions(-) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 11b7a0b..b6ad913 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -1083,9 +1083,29 @@ static inline CPUARMState *cpu_init(const char *cpu_model) #define MMU_MODE0_SUFFIX _kernel #define MMU_MODE1_SUFFIX _user #define MMU_USER_IDX 1 + +static inline int arm_el_to_mmu_idx(int current_el) +{ +#ifdef CONFIG_USER_ONLY + return MMU_USER_IDX; +#else + switch (current_el) { + case 0: + return MMU_USER_IDX; + case 1: + return 0; + default: + /* Unsupported EL. */ + assert(0); + return 0; + } +#endif +} + static inline int cpu_mmu_index (CPUARMState *env) { - return arm_current_pl(env) ? 0 : 1; + int cur_el = arm_current_pl(env); + return arm_el_to_mmu_idx(cur_el); } #include "exec/cpu-all.h" diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index b62db4d..7fce05f 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -162,13 +162,9 @@ void aarch64_cpu_dump_state(CPUState *cs, FILE *f, } } -static int get_mem_index(DisasContext *s) +static inline int get_mem_index(DisasContext *s) { -#ifdef CONFIG_USER_ONLY - return 1; -#else - return s->user; -#endif + return arm_el_to_mmu_idx(s->current_pl); } void gen_a64_set_pc_im(uint64_t val) -- 1.8.3.2