From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39635) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WmJql-0007kC-PA for qemu-devel@nongnu.org; Mon, 19 May 2014 05:27:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WmJqf-0006Ad-Qv for qemu-devel@nongnu.org; Mon, 19 May 2014 05:27:15 -0400 Received: from mail-yh0-x22a.google.com ([2607:f8b0:4002:c01::22a]:46484) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WmJqf-0006AB-Nj for qemu-devel@nongnu.org; Mon, 19 May 2014 05:27:09 -0400 Received: by mail-yh0-f42.google.com with SMTP id t59so6528545yho.15 for ; Mon, 19 May 2014 02:27:09 -0700 (PDT) From: "Edgar E. Iglesias" Date: Mon, 19 May 2014 19:22:46 +1000 Message-Id: <1400491383-6725-6-git-send-email-edgar.iglesias@gmail.com> In-Reply-To: <1400491383-6725-1-git-send-email-edgar.iglesias@gmail.com> References: <1400491383-6725-1-git-send-email-edgar.iglesias@gmail.com> Subject: [Qemu-devel] [PATCH v3 05/22] target-arm: Move get_mem_index to translate.h List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, peter.maydell@linaro.org Cc: rob.herring@linaro.org, peter.crosthwaite@xilinx.com, aggelerf@ethz.ch, agraf@suse.de, john.williams@xilinx.com, alex.bennee@linaro.org, christoffer.dall@linaro.org, rth@twiddle.net From: "Edgar E. Iglesias" So that it can be shared with the A32 code in the future. Signed-off-by: Edgar E. Iglesias --- target-arm/translate-a64.c | 5 ----- target-arm/translate.h | 5 +++++ 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index 7fce05f..bfd139a 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -162,11 +162,6 @@ void aarch64_cpu_dump_state(CPUState *cs, FILE *f, } } -static inline int get_mem_index(DisasContext *s) -{ - return arm_el_to_mmu_idx(s->current_pl); -} - void gen_a64_set_pc_im(uint64_t val) { tcg_gen_movi_i64(cpu_pc, val); diff --git a/target-arm/translate.h b/target-arm/translate.h index 34328f4..db6f0af 100644 --- a/target-arm/translate.h +++ b/target-arm/translate.h @@ -52,6 +52,11 @@ static inline int arm_dc_feature(DisasContext *dc, int feature) return (dc->features & (1ULL << feature)) != 0; } +static inline int get_mem_index(DisasContext *s) +{ + return arm_el_to_mmu_idx(s->current_pl); +} + /* target-specific extra values for is_jmp */ /* These instructions trap after executing, so the A32/T32 decoder must * defer them until after the conditional execution state has been updated. -- 1.8.3.2