From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: qemu-devel@nongnu.org, peter.maydell@linaro.org
Cc: rob.herring@linaro.org, peter.crosthwaite@xilinx.com,
aggelerf@ethz.ch, agraf@suse.de, john.williams@xilinx.com,
alex.bennee@linaro.org, christoffer.dall@linaro.org,
rth@twiddle.net
Subject: [Qemu-devel] [PATCH v4 04/21] target-arm: Move get_mem_index to translate.h
Date: Fri, 23 May 2014 10:42:01 +1000 [thread overview]
Message-ID: <1400805738-11889-5-git-send-email-edgar.iglesias@gmail.com> (raw)
In-Reply-To: <1400805738-11889-1-git-send-email-edgar.iglesias@gmail.com>
From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
So that it can be shared with the AArch32 code.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
target-arm/translate-a64.c | 9 ---------
target-arm/translate.h | 9 +++++++++
2 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index b62db4d..bfd139a 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -162,15 +162,6 @@ void aarch64_cpu_dump_state(CPUState *cs, FILE *f,
}
}
-static int get_mem_index(DisasContext *s)
-{
-#ifdef CONFIG_USER_ONLY
- return 1;
-#else
- return s->user;
-#endif
-}
-
void gen_a64_set_pc_im(uint64_t val)
{
tcg_gen_movi_i64(cpu_pc, val);
diff --git a/target-arm/translate.h b/target-arm/translate.h
index 34328f4..8737af0 100644
--- a/target-arm/translate.h
+++ b/target-arm/translate.h
@@ -52,6 +52,15 @@ static inline int arm_dc_feature(DisasContext *dc, int feature)
return (dc->features & (1ULL << feature)) != 0;
}
+static inline int get_mem_index(DisasContext *s)
+{
+#ifdef CONFIG_USER_ONLY
+ return 1;
+#else
+ return s->user;
+#endif
+}
+
/* target-specific extra values for is_jmp */
/* These instructions trap after executing, so the A32/T32 decoder must
* defer them until after the conditional execution state has been updated.
--
1.8.3.2
next prev parent reply other threads:[~2014-05-23 0:45 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-23 0:41 [Qemu-devel] [PATCH v4 00/21] target-arm: Preparations for A64 EL2 and 3 Edgar E. Iglesias
2014-05-23 0:41 ` [Qemu-devel] [PATCH v4 01/21] target-arm: Make elr_el1 an array Edgar E. Iglesias
2014-05-23 0:41 ` [Qemu-devel] [PATCH v4 02/21] target-arm: Make esr_el1 " Edgar E. Iglesias
2014-05-23 0:42 ` [Qemu-devel] [PATCH v4 03/21] target-arm: c12_vbar -> vbar_el[] Edgar E. Iglesias
2014-05-23 0:42 ` Edgar E. Iglesias [this message]
2014-05-23 0:42 ` [Qemu-devel] [PATCH v4 05/21] target-arm: A32: Use get_mem_index for load/stores Edgar E. Iglesias
2014-05-23 14:26 ` Peter Maydell
2014-05-23 14:45 ` Peter Maydell
2014-05-23 0:42 ` [Qemu-devel] [PATCH v4 06/21] target-arm: Use a 1:1 mapping between EL and MMU index Edgar E. Iglesias
2014-05-23 14:04 ` Peter Maydell
2014-05-23 0:42 ` [Qemu-devel] [PATCH v4 07/21] target-arm: A64: Add SP entries for EL2 and 3 Edgar E. Iglesias
2014-05-23 0:42 ` [Qemu-devel] [PATCH v4 08/21] target-arm: A64: Add ELR " Edgar E. Iglesias
2014-05-23 0:42 ` [Qemu-devel] [PATCH v4 09/21] target-arm: Add SPSR entries for EL2/HYP and EL3/MON Edgar E. Iglesias
2014-05-23 0:42 ` [Qemu-devel] [PATCH v4 10/21] target-arm: A64: Introduce aarch64_banked_spsr_index() Edgar E. Iglesias
2014-05-23 0:42 ` [Qemu-devel] [PATCH v4 11/21] target-arm: Add a feature flag for EL2 Edgar E. Iglesias
2014-05-23 0:42 ` [Qemu-devel] [PATCH v4 12/21] target-arm: Add a feature flag for EL3 Edgar E. Iglesias
2014-05-23 0:42 ` [Qemu-devel] [PATCH v4 13/21] target-arm: Register EL2 versions of ELR and SPSR Edgar E. Iglesias
2014-05-23 0:42 ` [Qemu-devel] [PATCH v4 14/21] target-arm: Register EL3 " Edgar E. Iglesias
2014-05-23 0:42 ` [Qemu-devel] [PATCH v4 15/21] target-arm: A64: Forbid ERET to higher or unimplemented ELs Edgar E. Iglesias
2014-05-23 0:42 ` [Qemu-devel] [PATCH v4 16/21] target-arm: A64: Trap ERET from EL0 at translation time Edgar E. Iglesias
2014-05-23 0:42 ` [Qemu-devel] [PATCH v4 17/21] target-arm: A64: Generalize ERET to various ELs Edgar E. Iglesias
2014-05-23 0:42 ` [Qemu-devel] [PATCH v4 18/21] target-arm: A64: Generalize update_spsel for the " Edgar E. Iglesias
2014-05-23 0:42 ` [Qemu-devel] [PATCH v4 19/21] target-arm: Make vbar_write writeback to any CPREG Edgar E. Iglesias
2014-05-23 0:42 ` [Qemu-devel] [PATCH v4 20/21] target-arm: A64: Register VBAR_EL2 Edgar E. Iglesias
2014-05-23 0:42 ` [Qemu-devel] [PATCH v4 21/21] target-arm: A64: Register VBAR_EL3 Edgar E. Iglesias
2014-05-23 12:54 ` [Qemu-devel] [PATCH v4 00/21] target-arm: Preparations for A64 EL2 and 3 Peter Maydell
2014-05-23 15:39 ` Peter Maydell
2014-05-25 0:28 ` Edgar E. Iglesias
2014-05-25 9:09 ` Peter Maydell
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