From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 18/24] tcg-mips: Simplify setcond
Date: Sat, 24 May 2014 08:53:55 -0700 [thread overview]
Message-ID: <1400946841-21079-19-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1400946841-21079-1-git-send-email-rth@twiddle.net>
Use a table to fold comparisons to less-than.
Also, move the function up in the file for futher simplifications.
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
tcg/mips/tcg-target.c | 125 +++++++++++++++++++++++++++-----------------------
1 file changed, 67 insertions(+), 58 deletions(-)
diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c
index 810f351..278925c 100644
--- a/tcg/mips/tcg-target.c
+++ b/tcg/mips/tcg-target.c
@@ -567,6 +567,73 @@ static inline void tcg_out_addi(TCGContext *s, TCGReg reg, TCGArg val)
}
}
+/* Bit 0 set if inversion required; bit 1 set if swapping required. */
+#define MIPS_CMP_INV 1
+#define MIPS_CMP_SWAP 2
+
+static const uint8_t mips_cmp_map[16] = {
+ [TCG_COND_LT] = 0,
+ [TCG_COND_LTU] = 0,
+ [TCG_COND_GE] = MIPS_CMP_INV,
+ [TCG_COND_GEU] = MIPS_CMP_INV,
+ [TCG_COND_LE] = MIPS_CMP_INV | MIPS_CMP_SWAP,
+ [TCG_COND_LEU] = MIPS_CMP_INV | MIPS_CMP_SWAP,
+ [TCG_COND_GT] = MIPS_CMP_SWAP,
+ [TCG_COND_GTU] = MIPS_CMP_SWAP,
+};
+
+static void tcg_out_setcond(TCGContext *s, TCGCond cond, TCGReg ret,
+ TCGReg arg1, TCGReg arg2)
+{
+ MIPSInsn s_opc = OPC_SLTU;
+ int cmp_map;
+
+ switch (cond) {
+ case TCG_COND_EQ:
+ if (arg2 != 0) {
+ tcg_out_opc_reg(s, OPC_XOR, ret, arg1, arg2);
+ arg1 = ret;
+ }
+ tcg_out_opc_imm(s, OPC_SLTIU, ret, arg1, 1);
+ break;
+
+ case TCG_COND_NE:
+ if (arg2 != 0) {
+ tcg_out_opc_reg(s, OPC_XOR, ret, arg1, arg2);
+ arg1 = ret;
+ }
+ tcg_out_opc_reg(s, OPC_SLTU, ret, TCG_REG_ZERO, arg1);
+ break;
+
+ case TCG_COND_LT:
+ case TCG_COND_GE:
+ case TCG_COND_LE:
+ case TCG_COND_GT:
+ s_opc = OPC_SLT;
+ /* FALLTHRU */
+
+ case TCG_COND_LTU:
+ case TCG_COND_GEU:
+ case TCG_COND_LEU:
+ case TCG_COND_GTU:
+ cmp_map = mips_cmp_map[cond];
+ if (cmp_map & MIPS_CMP_SWAP) {
+ TCGReg t = arg1;
+ arg1 = arg2;
+ arg2 = t;
+ }
+ tcg_out_opc_reg(s, s_opc, ret, arg1, arg2);
+ if (cmp_map & MIPS_CMP_INV) {
+ tcg_out_opc_imm(s, OPC_XORI, ret, ret, 1);
+ }
+ break;
+
+ default:
+ tcg_abort();
+ break;
+ }
+}
+
static void tcg_out_brcond(TCGContext *s, TCGCond cond, TCGArg arg1,
TCGArg arg2, int label_index)
{
@@ -767,64 +834,6 @@ static void tcg_out_movcond(TCGContext *s, TCGCond cond, TCGReg ret,
}
}
-static void tcg_out_setcond(TCGContext *s, TCGCond cond, TCGReg ret,
- TCGArg arg1, TCGArg arg2)
-{
- switch (cond) {
- case TCG_COND_EQ:
- if (arg1 == 0) {
- tcg_out_opc_imm(s, OPC_SLTIU, ret, arg2, 1);
- } else if (arg2 == 0) {
- tcg_out_opc_imm(s, OPC_SLTIU, ret, arg1, 1);
- } else {
- tcg_out_opc_reg(s, OPC_XOR, ret, arg1, arg2);
- tcg_out_opc_imm(s, OPC_SLTIU, ret, ret, 1);
- }
- break;
- case TCG_COND_NE:
- if (arg1 == 0) {
- tcg_out_opc_reg(s, OPC_SLTU, ret, TCG_REG_ZERO, arg2);
- } else if (arg2 == 0) {
- tcg_out_opc_reg(s, OPC_SLTU, ret, TCG_REG_ZERO, arg1);
- } else {
- tcg_out_opc_reg(s, OPC_XOR, ret, arg1, arg2);
- tcg_out_opc_reg(s, OPC_SLTU, ret, TCG_REG_ZERO, ret);
- }
- break;
- case TCG_COND_LT:
- tcg_out_opc_reg(s, OPC_SLT, ret, arg1, arg2);
- break;
- case TCG_COND_LTU:
- tcg_out_opc_reg(s, OPC_SLTU, ret, arg1, arg2);
- break;
- case TCG_COND_GE:
- tcg_out_opc_reg(s, OPC_SLT, ret, arg1, arg2);
- tcg_out_opc_imm(s, OPC_XORI, ret, ret, 1);
- break;
- case TCG_COND_GEU:
- tcg_out_opc_reg(s, OPC_SLTU, ret, arg1, arg2);
- tcg_out_opc_imm(s, OPC_XORI, ret, ret, 1);
- break;
- case TCG_COND_LE:
- tcg_out_opc_reg(s, OPC_SLT, ret, arg2, arg1);
- tcg_out_opc_imm(s, OPC_XORI, ret, ret, 1);
- break;
- case TCG_COND_LEU:
- tcg_out_opc_reg(s, OPC_SLTU, ret, arg2, arg1);
- tcg_out_opc_imm(s, OPC_XORI, ret, ret, 1);
- break;
- case TCG_COND_GT:
- tcg_out_opc_reg(s, OPC_SLT, ret, arg2, arg1);
- break;
- case TCG_COND_GTU:
- tcg_out_opc_reg(s, OPC_SLTU, ret, arg2, arg1);
- break;
- default:
- tcg_abort();
- break;
- }
-}
-
/* XXX: we implement it at the target level to avoid having to
handle cross basic blocks temporaries */
static void tcg_out_setcond2(TCGContext *s, TCGCond cond, TCGReg ret,
--
1.9.0
next prev parent reply other threads:[~2014-05-24 15:54 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-24 15:53 [Qemu-devel] [PULL 00/24] tcg mips updates Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 01/24] tcg-mips: Layout executable and code_gen_buffer Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 02/24] tcg-mips: Constrain the code_gen_buffer to be within one 256mb segment Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 03/24] tcg-mips: Use J and JAL opcodes Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 04/24] tcg-mips: Fill the exit_tb delay slot Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 05/24] tcg-mips: Split large ldst offsets Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 06/24] tcg-mips: Move softmmu slow path out of line Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 07/24] tcg-mips: Convert to new qemu_l/st helpers Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 08/24] tcg-mips: Convert to new_ldst Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 09/24] tcg-mips: Rearrange register allocation Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 10/24] tcg-mips: Introduce TCG_TMP0, TCG_TMP1 Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 11/24] tcg-mips: Use T9 for TCG_TMP1 Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 12/24] tcg-mips: Use EXT for AND on mips32r2 Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 13/24] tcg-mips: Name the opcode enumeration Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 14/24] tcg-mips: Fix subtract immediate range Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 15/24] tcg-mips: Hoist args loads Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 16/24] tcg-mips: Improve add2/sub2 Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 17/24] tcg-mips: Commonize opcode implementations Richard Henderson
2014-05-24 15:53 ` Richard Henderson [this message]
2014-05-24 15:53 ` [Qemu-devel] [PULL 19/24] tcg-mips: Simplify brcond Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 20/24] tcg-mips: Simplify setcond2 Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 21/24] tcg-mips: Improve setcond eq/ne vs zeros Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 22/24] tcg-mips: Simplify brcond2 Richard Henderson
2014-05-24 15:54 ` [Qemu-devel] [PULL 23/24] tcg-mips: Simplify movcond Richard Henderson
2014-05-24 15:54 ` [Qemu-devel] [PULL 24/24] tcg-mips: Enable direct chaining of TBs Richard Henderson
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