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From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 21/24] tcg-mips: Improve setcond eq/ne vs zeros
Date: Sat, 24 May 2014 08:53:58 -0700	[thread overview]
Message-ID: <1400946841-21079-22-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1400946841-21079-1-git-send-email-rth@twiddle.net>

The original code results in one too many insns per zero
present in the input.  And since comparing 64-bit numbers
vs zero is common...

Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 tcg/mips/tcg-target.c | 40 ++++++++++++++++++++++++++++++++++++----
 1 file changed, 36 insertions(+), 4 deletions(-)

diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c
index 1429ec7..ccf262b 100644
--- a/tcg/mips/tcg-target.c
+++ b/tcg/mips/tcg-target.c
@@ -701,6 +701,40 @@ static void tcg_out_brcond(TCGContext *s, TCGCond cond, TCGReg arg1,
     tcg_out_nop(s);
 }
 
+static TCGReg tcg_out_reduce_eq2(TCGContext *s, TCGReg tmp0, TCGReg tmp1,
+                                 TCGReg al, TCGReg ah,
+                                 TCGReg bl, TCGReg bh)
+{
+    /* Merge highpart comparison into AH.  */
+    if (bh != 0) {
+        if (ah != 0) {
+            tcg_out_opc_reg(s, OPC_XOR, tmp0, ah, bh);
+            ah = tmp0;
+        } else {
+            ah = bh;
+        }
+    }
+    /* Merge lowpart comparison into AL.  */
+    if (bl != 0) {
+        if (al != 0) {
+            tcg_out_opc_reg(s, OPC_XOR, tmp1, al, bl);
+            al = tmp1;
+        } else {
+            al = bl;
+        }
+    }
+    /* Merge high and low part comparisons into AL.  */
+    if (ah != 0) {
+        if (al != 0) {
+            tcg_out_opc_reg(s, OPC_OR, tmp0, ah, al);
+            al = tmp0;
+        } else {
+            al = ah;
+        }
+    }
+    return al;
+}
+
 static void tcg_out_setcond2(TCGContext *s, TCGCond cond, TCGReg ret,
                              TCGReg al, TCGReg ah, TCGReg bl, TCGReg bh)
 {
@@ -716,10 +750,8 @@ static void tcg_out_setcond2(TCGContext *s, TCGCond cond, TCGReg ret,
     switch (cond) {
     case TCG_COND_EQ:
     case TCG_COND_NE:
-        tcg_out_setcond(s, cond, tmp0, ah, bh);
-        tcg_out_setcond(s, cond, ret, al, bl);
-        tcg_out_opc_reg(s, (cond == TCG_COND_EQ ? OPC_AND : OPC_OR),
-                        ret, ret, tmp0);
+        tmp1 = tcg_out_reduce_eq2(s, tmp0, tmp1, al, ah, bl, bh);
+        tcg_out_setcond(s, cond, ret, tmp1, TCG_REG_ZERO);
         break;
 
     default:
-- 
1.9.0

  parent reply	other threads:[~2014-05-24 15:54 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-05-24 15:53 [Qemu-devel] [PULL 00/24] tcg mips updates Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 01/24] tcg-mips: Layout executable and code_gen_buffer Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 02/24] tcg-mips: Constrain the code_gen_buffer to be within one 256mb segment Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 03/24] tcg-mips: Use J and JAL opcodes Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 04/24] tcg-mips: Fill the exit_tb delay slot Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 05/24] tcg-mips: Split large ldst offsets Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 06/24] tcg-mips: Move softmmu slow path out of line Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 07/24] tcg-mips: Convert to new qemu_l/st helpers Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 08/24] tcg-mips: Convert to new_ldst Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 09/24] tcg-mips: Rearrange register allocation Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 10/24] tcg-mips: Introduce TCG_TMP0, TCG_TMP1 Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 11/24] tcg-mips: Use T9 for TCG_TMP1 Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 12/24] tcg-mips: Use EXT for AND on mips32r2 Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 13/24] tcg-mips: Name the opcode enumeration Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 14/24] tcg-mips: Fix subtract immediate range Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 15/24] tcg-mips: Hoist args loads Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 16/24] tcg-mips: Improve add2/sub2 Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 17/24] tcg-mips: Commonize opcode implementations Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 18/24] tcg-mips: Simplify setcond Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 19/24] tcg-mips: Simplify brcond Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 20/24] tcg-mips: Simplify setcond2 Richard Henderson
2014-05-24 15:53 ` Richard Henderson [this message]
2014-05-24 15:53 ` [Qemu-devel] [PULL 22/24] tcg-mips: Simplify brcond2 Richard Henderson
2014-05-24 15:54 ` [Qemu-devel] [PULL 23/24] tcg-mips: Simplify movcond Richard Henderson
2014-05-24 15:54 ` [Qemu-devel] [PULL 24/24] tcg-mips: Enable direct chaining of TBs Richard Henderson

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