From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 23/24] tcg-mips: Simplify movcond
Date: Sat, 24 May 2014 08:54:00 -0700 [thread overview]
Message-ID: <1400946841-21079-24-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1400946841-21079-1-git-send-email-rth@twiddle.net>
Use the same table to fold comparisons as with setcond.
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
tcg/mips/tcg-target.c | 66 +++++++++++++--------------------------------------
1 file changed, 17 insertions(+), 49 deletions(-)
diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c
index 0e5ecf4..ad752c4 100644
--- a/tcg/mips/tcg-target.c
+++ b/tcg/mips/tcg-target.c
@@ -794,65 +794,33 @@ static void tcg_out_brcond2(TCGContext *s, TCGCond cond, TCGReg al, TCGReg ah,
}
static void tcg_out_movcond(TCGContext *s, TCGCond cond, TCGReg ret,
- TCGArg c1, TCGArg c2, TCGArg v)
+ TCGReg c1, TCGReg c2, TCGReg v)
{
+ MIPSInsn m_opc = OPC_MOVN;
+
switch (cond) {
case TCG_COND_EQ:
- if (c1 == 0) {
- tcg_out_opc_reg(s, OPC_MOVZ, ret, v, c2);
- } else if (c2 == 0) {
- tcg_out_opc_reg(s, OPC_MOVZ, ret, v, c1);
- } else {
- tcg_out_opc_reg(s, OPC_XOR, TCG_TMP0, c1, c2);
- tcg_out_opc_reg(s, OPC_MOVZ, ret, v, TCG_TMP0);
- }
- break;
+ m_opc = OPC_MOVZ;
+ /* FALLTHRU */
case TCG_COND_NE:
- if (c1 == 0) {
- tcg_out_opc_reg(s, OPC_MOVN, ret, v, c2);
- } else if (c2 == 0) {
- tcg_out_opc_reg(s, OPC_MOVN, ret, v, c1);
- } else {
+ if (c2 != 0) {
tcg_out_opc_reg(s, OPC_XOR, TCG_TMP0, c1, c2);
- tcg_out_opc_reg(s, OPC_MOVN, ret, v, TCG_TMP0);
+ c1 = TCG_TMP0;
}
break;
- case TCG_COND_LT:
- tcg_out_opc_reg(s, OPC_SLT, TCG_TMP0, c1, c2);
- tcg_out_opc_reg(s, OPC_MOVN, ret, v, TCG_TMP0);
- break;
- case TCG_COND_LTU:
- tcg_out_opc_reg(s, OPC_SLTU, TCG_TMP0, c1, c2);
- tcg_out_opc_reg(s, OPC_MOVN, ret, v, TCG_TMP0);
- break;
- case TCG_COND_GE:
- tcg_out_opc_reg(s, OPC_SLT, TCG_TMP0, c1, c2);
- tcg_out_opc_reg(s, OPC_MOVZ, ret, v, TCG_TMP0);
- break;
- case TCG_COND_GEU:
- tcg_out_opc_reg(s, OPC_SLTU, TCG_TMP0, c1, c2);
- tcg_out_opc_reg(s, OPC_MOVZ, ret, v, TCG_TMP0);
- break;
- case TCG_COND_LE:
- tcg_out_opc_reg(s, OPC_SLT, TCG_TMP0, c2, c1);
- tcg_out_opc_reg(s, OPC_MOVZ, ret, v, TCG_TMP0);
- break;
- case TCG_COND_LEU:
- tcg_out_opc_reg(s, OPC_SLTU, TCG_TMP0, c2, c1);
- tcg_out_opc_reg(s, OPC_MOVZ, ret, v, TCG_TMP0);
- break;
- case TCG_COND_GT:
- tcg_out_opc_reg(s, OPC_SLT, TCG_TMP0, c2, c1);
- tcg_out_opc_reg(s, OPC_MOVN, ret, v, TCG_TMP0);
- break;
- case TCG_COND_GTU:
- tcg_out_opc_reg(s, OPC_SLTU, TCG_TMP0, c2, c1);
- tcg_out_opc_reg(s, OPC_MOVN, ret, v, TCG_TMP0);
- break;
+
default:
- tcg_abort();
+ /* Minimize code size by prefering a compare not requiring INV. */
+ if (mips_cmp_map[cond] & MIPS_CMP_INV) {
+ cond = tcg_invert_cond(cond);
+ m_opc = OPC_MOVZ;
+ }
+ tcg_out_setcond(s, cond, TCG_TMP0, c1, c2);
+ c1 = TCG_TMP0;
break;
}
+
+ tcg_out_opc_reg(s, m_opc, ret, v, c1);
}
static void tcg_out_call_int(TCGContext *s, tcg_insn_unit *arg, bool tail)
--
1.9.0
next prev parent reply other threads:[~2014-05-24 15:55 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-24 15:53 [Qemu-devel] [PULL 00/24] tcg mips updates Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 01/24] tcg-mips: Layout executable and code_gen_buffer Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 02/24] tcg-mips: Constrain the code_gen_buffer to be within one 256mb segment Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 03/24] tcg-mips: Use J and JAL opcodes Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 04/24] tcg-mips: Fill the exit_tb delay slot Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 05/24] tcg-mips: Split large ldst offsets Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 06/24] tcg-mips: Move softmmu slow path out of line Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 07/24] tcg-mips: Convert to new qemu_l/st helpers Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 08/24] tcg-mips: Convert to new_ldst Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 09/24] tcg-mips: Rearrange register allocation Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 10/24] tcg-mips: Introduce TCG_TMP0, TCG_TMP1 Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 11/24] tcg-mips: Use T9 for TCG_TMP1 Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 12/24] tcg-mips: Use EXT for AND on mips32r2 Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 13/24] tcg-mips: Name the opcode enumeration Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 14/24] tcg-mips: Fix subtract immediate range Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 15/24] tcg-mips: Hoist args loads Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 16/24] tcg-mips: Improve add2/sub2 Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 17/24] tcg-mips: Commonize opcode implementations Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 18/24] tcg-mips: Simplify setcond Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 19/24] tcg-mips: Simplify brcond Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 20/24] tcg-mips: Simplify setcond2 Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 21/24] tcg-mips: Improve setcond eq/ne vs zeros Richard Henderson
2014-05-24 15:53 ` [Qemu-devel] [PULL 22/24] tcg-mips: Simplify brcond2 Richard Henderson
2014-05-24 15:54 ` Richard Henderson [this message]
2014-05-24 15:54 ` [Qemu-devel] [PULL 24/24] tcg-mips: Enable direct chaining of TBs Richard Henderson
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