From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: qemu-devel@nongnu.org, peter.maydell@linaro.org
Cc: rob.herring@linaro.org, peter.crosthwaite@xilinx.com,
aggelerf@ethz.ch, agraf@suse.de, john.williams@xilinx.com,
greg.bellows@linaro.org, alex.bennee@linaro.org,
christoffer.dall@linaro.org, rth@twiddle.net
Subject: [Qemu-devel] [PATCH v5 19/23] target-arm: A64: Generalize ERET to various ELs
Date: Sun, 25 May 2014 11:08:48 +1000 [thread overview]
Message-ID: <1400980132-25949-20-git-send-email-edgar.iglesias@gmail.com> (raw)
In-Reply-To: <1400980132-25949-1-git-send-email-edgar.iglesias@gmail.com>
From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
Adds support for ERET to and from AArch64 EL2 and 3.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
target-arm/op_helper.c | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
index e95a7f4..50a4157 100644
--- a/target-arm/op_helper.c
+++ b/target-arm/op_helper.c
@@ -386,13 +386,13 @@ void HELPER(msr_i_pstate)(CPUARMState *env, uint32_t op, uint32_t imm)
void HELPER(exception_return)(CPUARMState *env)
{
- unsigned int spsr_idx = aarch64_banked_spsr_index(1);
+ int cur_el = arm_current_pl(env);
+ unsigned int spsr_idx = aarch64_banked_spsr_index(cur_el);
uint32_t spsr = env->banked_spsr[spsr_idx];
int new_el, i;
- int cur_el = arm_current_pl(env);
if (env->pstate & PSTATE_SP) {
- env->sp_el[1] = env->xregs[31];
+ env->sp_el[cur_el] = env->xregs[31];
} else {
env->sp_el[0] = env->xregs[31];
}
@@ -400,6 +400,7 @@ void HELPER(exception_return)(CPUARMState *env)
env->exclusive_addr = -1;
if (spsr & PSTATE_nRW) {
+ /* TODO: We currently assume EL1/2/3 are running in AArch64. */
env->aarch64 = 0;
new_el = 0;
env->uncached_cpsr = 0x10;
@@ -429,7 +430,7 @@ void HELPER(exception_return)(CPUARMState *env)
env->aarch64 = 1;
pstate_write(env, spsr);
env->xregs[31] = env->sp_el[new_el];
- env->pc = env->elr_el[1];
+ env->pc = env->elr_el[cur_el];
}
return;
@@ -443,7 +444,7 @@ illegal_return:
* no change to exception level, execution state or stack pointer
*/
env->pstate |= PSTATE_IL;
- env->pc = env->elr_el[1];
+ env->pc = env->elr_el[cur_el];
spsr &= PSTATE_NZCV | PSTATE_DAIF;
spsr |= pstate_read(env) & ~(PSTATE_NZCV | PSTATE_DAIF);
pstate_write(env, spsr);
--
1.8.3.2
next prev parent reply other threads:[~2014-05-25 1:22 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-25 1:08 [Qemu-devel] [PATCH v5 00/23] target-arm: Preparations for A64 EL2 and 3 Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 01/23] target-arm: Move get_mem_index to translate.h Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 02/23] target-arm/translate.c: Clean up mmu index handling for ldrt/strt Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 03/23] target-arm/translate.c: Use get_mem_index() for SRS memory accesses Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 04/23] target-arm: A32: Use get_mem_index for load/stores Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 05/23] target-arm: Use a 1:1 mapping between EL and MMU index Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 06/23] target-arm: Make elr_el1 an array Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 07/23] target-arm: Make esr_el1 " Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 08/23] target-arm: c12_vbar -> vbar_el[] Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 09/23] target-arm: A64: Add SP entries for EL2 and 3 Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 10/23] target-arm: A64: Add ELR " Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 11/23] target-arm: Add SPSR entries for EL2/HYP and EL3/MON Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 12/23] target-arm: A64: Introduce aarch64_banked_spsr_index() Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 13/23] target-arm: Add a feature flag for EL2 Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 14/23] target-arm: Add a feature flag for EL3 Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 15/23] target-arm: Register EL2 versions of ELR and SPSR Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 16/23] target-arm: Register EL3 " Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 17/23] target-arm: A64: Forbid ERET to higher or unimplemented ELs Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 18/23] target-arm: A64: Trap ERET from EL0 at translation time Edgar E. Iglesias
2014-05-25 1:08 ` Edgar E. Iglesias [this message]
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 20/23] target-arm: A64: Generalize update_spsel for the various ELs Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 21/23] target-arm: Make vbar_write writeback to any CPREG Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 22/23] target-arm: A64: Register VBAR_EL2 Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 23/23] target-arm: A64: Register VBAR_EL3 Edgar E. Iglesias
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