From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58604) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WoNAP-0007Bq-87 for qemu-devel@nongnu.org; Sat, 24 May 2014 21:24:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WoNAF-0007pU-3J for qemu-devel@nongnu.org; Sat, 24 May 2014 21:24:01 -0400 Received: from mail-pa0-x234.google.com ([2607:f8b0:400e:c03::234]:43311) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WoNAE-0007pN-SG for qemu-devel@nongnu.org; Sat, 24 May 2014 21:23:51 -0400 Received: by mail-pa0-f52.google.com with SMTP id fa1so5879654pad.11 for ; Sat, 24 May 2014 18:23:50 -0700 (PDT) From: "Edgar E. Iglesias" Date: Sun, 25 May 2014 11:08:50 +1000 Message-Id: <1400980132-25949-22-git-send-email-edgar.iglesias@gmail.com> In-Reply-To: <1400980132-25949-1-git-send-email-edgar.iglesias@gmail.com> References: <1400980132-25949-1-git-send-email-edgar.iglesias@gmail.com> Subject: [Qemu-devel] [PATCH v5 21/23] target-arm: Make vbar_write writeback to any CPREG List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, peter.maydell@linaro.org Cc: rob.herring@linaro.org, peter.crosthwaite@xilinx.com, aggelerf@ethz.ch, agraf@suse.de, john.williams@xilinx.com, greg.bellows@linaro.org, alex.bennee@linaro.org, christoffer.dall@linaro.org, rth@twiddle.net From: "Edgar E. Iglesias" Reviewed-by: Peter Crosthwaite Signed-off-by: Edgar E. Iglesias --- target-arm/helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index cb7c964a..5a2073e 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -657,7 +657,7 @@ static void vbar_write(CPUARMState *env, const ARMCPRegInfo *ri, * contexts. (ARMv8 would permit us to do no masking at all, but ARMv7 * requires the bottom five bits to be RAZ/WI because they're UNK/SBZP.) */ - env->cp15.vbar_el[1] = value & ~0x1FULL; + raw_write(env, ri, value & ~0x1FULL); } static uint64_t ccsidr_read(CPUARMState *env, const ARMCPRegInfo *ri) -- 1.8.3.2