From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: qemu-devel@nongnu.org, peter.maydell@linaro.org
Cc: rob.herring@linaro.org, peter.crosthwaite@xilinx.com,
aggelerf@ethz.ch, agraf@suse.de, john.williams@xilinx.com,
greg.bellows@linaro.org, alex.bennee@linaro.org,
christoffer.dall@linaro.org, rth@twiddle.net
Subject: [Qemu-devel] [PATCH v5 03/23] target-arm/translate.c: Use get_mem_index() for SRS memory accesses
Date: Sun, 25 May 2014 11:08:32 +1000 [thread overview]
Message-ID: <1400980132-25949-4-git-send-email-edgar.iglesias@gmail.com> (raw)
In-Reply-To: <1400980132-25949-1-git-send-email-edgar.iglesias@gmail.com>
From: Peter Maydell <peter.maydell@linaro.org>
The SRS instruction was using a hardcoded 0 for the memory
accesses. This happens to be OK since the SRS instruction is
UNPREDICTABLE in User and System modes, but is awkward if we
want to rearrange the MMU index uses. Switch to using
get_mem_index() like all the other accesses.
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/translate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target-arm/translate.c b/target-arm/translate.c
index e708f4a..e40b0a7 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -7338,11 +7338,11 @@ static void gen_srs(DisasContext *s,
}
tcg_gen_addi_i32(addr, addr, offset);
tmp = load_reg(s, 14);
- gen_aa32_st32(tmp, addr, 0);
+ gen_aa32_st32(tmp, addr, get_mem_index(s));
tcg_temp_free_i32(tmp);
tmp = load_cpu_field(spsr);
tcg_gen_addi_i32(addr, addr, 4);
- gen_aa32_st32(tmp, addr, 0);
+ gen_aa32_st32(tmp, addr, get_mem_index(s));
tcg_temp_free_i32(tmp);
if (writeback) {
switch (amode) {
--
1.8.3.2
next prev parent reply other threads:[~2014-05-25 1:11 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-25 1:08 [Qemu-devel] [PATCH v5 00/23] target-arm: Preparations for A64 EL2 and 3 Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 01/23] target-arm: Move get_mem_index to translate.h Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 02/23] target-arm/translate.c: Clean up mmu index handling for ldrt/strt Edgar E. Iglesias
2014-05-25 1:08 ` Edgar E. Iglesias [this message]
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 04/23] target-arm: A32: Use get_mem_index for load/stores Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 05/23] target-arm: Use a 1:1 mapping between EL and MMU index Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 06/23] target-arm: Make elr_el1 an array Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 07/23] target-arm: Make esr_el1 " Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 08/23] target-arm: c12_vbar -> vbar_el[] Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 09/23] target-arm: A64: Add SP entries for EL2 and 3 Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 10/23] target-arm: A64: Add ELR " Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 11/23] target-arm: Add SPSR entries for EL2/HYP and EL3/MON Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 12/23] target-arm: A64: Introduce aarch64_banked_spsr_index() Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 13/23] target-arm: Add a feature flag for EL2 Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 14/23] target-arm: Add a feature flag for EL3 Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 15/23] target-arm: Register EL2 versions of ELR and SPSR Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 16/23] target-arm: Register EL3 " Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 17/23] target-arm: A64: Forbid ERET to higher or unimplemented ELs Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 18/23] target-arm: A64: Trap ERET from EL0 at translation time Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 19/23] target-arm: A64: Generalize ERET to various ELs Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 20/23] target-arm: A64: Generalize update_spsel for the " Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 21/23] target-arm: Make vbar_write writeback to any CPREG Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 22/23] target-arm: A64: Register VBAR_EL2 Edgar E. Iglesias
2014-05-25 1:08 ` [Qemu-devel] [PATCH v5 23/23] target-arm: A64: Register VBAR_EL3 Edgar E. Iglesias
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