From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56876) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WoMyU-0005k0-Ld for qemu-devel@nongnu.org; Sat, 24 May 2014 21:11:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WoMyP-0004gE-TZ for qemu-devel@nongnu.org; Sat, 24 May 2014 21:11:42 -0400 Received: from mail-pa0-x22e.google.com ([2607:f8b0:400e:c03::22e]:35811) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WoMyP-0004g6-Mr for qemu-devel@nongnu.org; Sat, 24 May 2014 21:11:37 -0400 Received: by mail-pa0-f46.google.com with SMTP id kq14so5800549pab.5 for ; Sat, 24 May 2014 18:11:36 -0700 (PDT) From: "Edgar E. Iglesias" Date: Sun, 25 May 2014 11:08:32 +1000 Message-Id: <1400980132-25949-4-git-send-email-edgar.iglesias@gmail.com> In-Reply-To: <1400980132-25949-1-git-send-email-edgar.iglesias@gmail.com> References: <1400980132-25949-1-git-send-email-edgar.iglesias@gmail.com> Subject: [Qemu-devel] [PATCH v5 03/23] target-arm/translate.c: Use get_mem_index() for SRS memory accesses List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, peter.maydell@linaro.org Cc: rob.herring@linaro.org, peter.crosthwaite@xilinx.com, aggelerf@ethz.ch, agraf@suse.de, john.williams@xilinx.com, greg.bellows@linaro.org, alex.bennee@linaro.org, christoffer.dall@linaro.org, rth@twiddle.net From: Peter Maydell The SRS instruction was using a hardcoded 0 for the memory accesses. This happens to be OK since the SRS instruction is UNPREDICTABLE in User and System modes, but is awkward if we want to rearrange the MMU index uses. Switch to using get_mem_index() like all the other accesses. Reviewed-by: Edgar E. Iglesias Signed-off-by: Peter Maydell --- target-arm/translate.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index e708f4a..e40b0a7 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -7338,11 +7338,11 @@ static void gen_srs(DisasContext *s, } tcg_gen_addi_i32(addr, addr, offset); tmp = load_reg(s, 14); - gen_aa32_st32(tmp, addr, 0); + gen_aa32_st32(tmp, addr, get_mem_index(s)); tcg_temp_free_i32(tmp); tmp = load_cpu_field(spsr); tcg_gen_addi_i32(addr, addr, 4); - gen_aa32_st32(tmp, addr, 0); + gen_aa32_st32(tmp, addr, get_mem_index(s)); tcg_temp_free_i32(tmp); if (writeback) { switch (amode) { -- 1.8.3.2