* [Qemu-devel] [PATCH 0/5] usb: improve ehci/uhci test
@ 2014-05-26 8:56 Gerd Hoffmann
2014-05-26 8:56 ` [Qemu-devel] [PATCH 1/5] qtest: fix qpci_config_writel Gerd Hoffmann
` (4 more replies)
0 siblings, 5 replies; 6+ messages in thread
From: Gerd Hoffmann @ 2014-05-26 8:56 UTC (permalink / raw)
To: qemu-devel; +Cc: Gerd Hoffmann
Hi,
Started hacking on the ehci test case.
please review,
Gerd
Gerd Hoffmann (5):
qtest: fix qpci_config_writel
usb: move uhci register defines to header file
usb: add uhci port status reserved bit
usb: move ehci register defines to header file
usb: improve ehci/uhci test
hw/usb/hcd-ehci.c | 79 +----------------------
hw/usb/hcd-uhci.c | 36 +----------
include/hw/usb/ehci-regs.h | 82 ++++++++++++++++++++++++
include/hw/usb/uhci-regs.h | 40 ++++++++++++
tests/Makefile | 4 +-
tests/libqos/pci.c | 2 +-
tests/usb-hcd-ehci-test.c | 153 +++++++++++++++++++++++++++++++++++++++++++--
7 files changed, 277 insertions(+), 119 deletions(-)
create mode 100644 include/hw/usb/ehci-regs.h
create mode 100644 include/hw/usb/uhci-regs.h
--
1.8.3.1
^ permalink raw reply [flat|nested] 6+ messages in thread* [Qemu-devel] [PATCH 1/5] qtest: fix qpci_config_writel 2014-05-26 8:56 [Qemu-devel] [PATCH 0/5] usb: improve ehci/uhci test Gerd Hoffmann @ 2014-05-26 8:56 ` Gerd Hoffmann 2014-05-26 8:56 ` [Qemu-devel] [PATCH 2/5] usb: move uhci register defines to header file Gerd Hoffmann ` (3 subsequent siblings) 4 siblings, 0 replies; 6+ messages in thread From: Gerd Hoffmann @ 2014-05-26 8:56 UTC (permalink / raw) To: qemu-devel; +Cc: Gerd Hoffmann Found by Paolo. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> --- tests/libqos/pci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/libqos/pci.c b/tests/libqos/pci.c index 7e0907b..c9a0b91 100644 --- a/tests/libqos/pci.c +++ b/tests/libqos/pci.c @@ -103,7 +103,7 @@ void qpci_config_writew(QPCIDevice *dev, uint8_t offset, uint16_t value) void qpci_config_writel(QPCIDevice *dev, uint8_t offset, uint32_t value) { - dev->bus->config_writew(dev->bus, dev->devfn, offset, value); + dev->bus->config_writel(dev->bus, dev->devfn, offset, value); } -- 1.8.3.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [Qemu-devel] [PATCH 2/5] usb: move uhci register defines to header file 2014-05-26 8:56 [Qemu-devel] [PATCH 0/5] usb: improve ehci/uhci test Gerd Hoffmann 2014-05-26 8:56 ` [Qemu-devel] [PATCH 1/5] qtest: fix qpci_config_writel Gerd Hoffmann @ 2014-05-26 8:56 ` Gerd Hoffmann 2014-05-26 8:56 ` [Qemu-devel] [PATCH 3/5] usb: add uhci port status reserved bit Gerd Hoffmann ` (2 subsequent siblings) 4 siblings, 0 replies; 6+ messages in thread From: Gerd Hoffmann @ 2014-05-26 8:56 UTC (permalink / raw) To: qemu-devel; +Cc: Gerd Hoffmann So we can easily use them in tests. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> --- hw/usb/hcd-uhci.c | 36 +----------------------------------- include/hw/usb/uhci-regs.h | 39 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 40 insertions(+), 35 deletions(-) create mode 100644 include/hw/usb/uhci-regs.h diff --git a/hw/usb/hcd-uhci.c b/hw/usb/hcd-uhci.c index 9b1166b..c3bf72c 100644 --- a/hw/usb/hcd-uhci.c +++ b/hw/usb/hcd-uhci.c @@ -27,6 +27,7 @@ */ #include "hw/hw.h" #include "hw/usb.h" +#include "hw/usb/uhci-regs.h" #include "hw/pci/pci.h" #include "qemu/timer.h" #include "qemu/iov.h" @@ -37,41 +38,6 @@ //#define DEBUG //#define DEBUG_DUMP_DATA -#define UHCI_CMD_FGR (1 << 4) -#define UHCI_CMD_EGSM (1 << 3) -#define UHCI_CMD_GRESET (1 << 2) -#define UHCI_CMD_HCRESET (1 << 1) -#define UHCI_CMD_RS (1 << 0) - -#define UHCI_STS_HCHALTED (1 << 5) -#define UHCI_STS_HCPERR (1 << 4) -#define UHCI_STS_HSERR (1 << 3) -#define UHCI_STS_RD (1 << 2) -#define UHCI_STS_USBERR (1 << 1) -#define UHCI_STS_USBINT (1 << 0) - -#define TD_CTRL_SPD (1 << 29) -#define TD_CTRL_ERROR_SHIFT 27 -#define TD_CTRL_IOS (1 << 25) -#define TD_CTRL_IOC (1 << 24) -#define TD_CTRL_ACTIVE (1 << 23) -#define TD_CTRL_STALL (1 << 22) -#define TD_CTRL_BABBLE (1 << 20) -#define TD_CTRL_NAK (1 << 19) -#define TD_CTRL_TIMEOUT (1 << 18) - -#define UHCI_PORT_SUSPEND (1 << 12) -#define UHCI_PORT_RESET (1 << 9) -#define UHCI_PORT_LSDA (1 << 8) -#define UHCI_PORT_RD (1 << 6) -#define UHCI_PORT_ENC (1 << 3) -#define UHCI_PORT_EN (1 << 2) -#define UHCI_PORT_CSC (1 << 1) -#define UHCI_PORT_CCS (1 << 0) - -#define UHCI_PORT_READ_ONLY (0x1bb) -#define UHCI_PORT_WRITE_CLEAR (UHCI_PORT_CSC | UHCI_PORT_ENC) - #define FRAME_TIMER_FREQ 1000 #define FRAME_MAX_LOOPS 256 diff --git a/include/hw/usb/uhci-regs.h b/include/hw/usb/uhci-regs.h new file mode 100644 index 0000000..63c8223 --- /dev/null +++ b/include/hw/usb/uhci-regs.h @@ -0,0 +1,39 @@ +#ifndef HW_USB_UHCI_REGS_H +#define HW_USB_UHCI_REGS_H 1 + +#define UHCI_CMD_FGR (1 << 4) +#define UHCI_CMD_EGSM (1 << 3) +#define UHCI_CMD_GRESET (1 << 2) +#define UHCI_CMD_HCRESET (1 << 1) +#define UHCI_CMD_RS (1 << 0) + +#define UHCI_STS_HCHALTED (1 << 5) +#define UHCI_STS_HCPERR (1 << 4) +#define UHCI_STS_HSERR (1 << 3) +#define UHCI_STS_RD (1 << 2) +#define UHCI_STS_USBERR (1 << 1) +#define UHCI_STS_USBINT (1 << 0) + +#define TD_CTRL_SPD (1 << 29) +#define TD_CTRL_ERROR_SHIFT 27 +#define TD_CTRL_IOS (1 << 25) +#define TD_CTRL_IOC (1 << 24) +#define TD_CTRL_ACTIVE (1 << 23) +#define TD_CTRL_STALL (1 << 22) +#define TD_CTRL_BABBLE (1 << 20) +#define TD_CTRL_NAK (1 << 19) +#define TD_CTRL_TIMEOUT (1 << 18) + +#define UHCI_PORT_SUSPEND (1 << 12) +#define UHCI_PORT_RESET (1 << 9) +#define UHCI_PORT_LSDA (1 << 8) +#define UHCI_PORT_RD (1 << 6) +#define UHCI_PORT_ENC (1 << 3) +#define UHCI_PORT_EN (1 << 2) +#define UHCI_PORT_CSC (1 << 1) +#define UHCI_PORT_CCS (1 << 0) + +#define UHCI_PORT_READ_ONLY (0x1bb) +#define UHCI_PORT_WRITE_CLEAR (UHCI_PORT_CSC | UHCI_PORT_ENC) + +#endif /* HW_USB_UHCI_REGS_H */ -- 1.8.3.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [Qemu-devel] [PATCH 3/5] usb: add uhci port status reserved bit 2014-05-26 8:56 [Qemu-devel] [PATCH 0/5] usb: improve ehci/uhci test Gerd Hoffmann 2014-05-26 8:56 ` [Qemu-devel] [PATCH 1/5] qtest: fix qpci_config_writel Gerd Hoffmann 2014-05-26 8:56 ` [Qemu-devel] [PATCH 2/5] usb: move uhci register defines to header file Gerd Hoffmann @ 2014-05-26 8:56 ` Gerd Hoffmann 2014-05-26 8:56 ` [Qemu-devel] [PATCH 4/5] usb: move ehci register defines to header file Gerd Hoffmann 2014-05-26 8:56 ` [Qemu-devel] [PATCH 5/5] usb: improve ehci/uhci test Gerd Hoffmann 4 siblings, 0 replies; 6+ messages in thread From: Gerd Hoffmann @ 2014-05-26 8:56 UTC (permalink / raw) To: qemu-devel; +Cc: Gerd Hoffmann Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> --- include/hw/usb/uhci-regs.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/hw/usb/uhci-regs.h b/include/hw/usb/uhci-regs.h index 63c8223..c7315c5 100644 --- a/include/hw/usb/uhci-regs.h +++ b/include/hw/usb/uhci-regs.h @@ -27,6 +27,7 @@ #define UHCI_PORT_SUSPEND (1 << 12) #define UHCI_PORT_RESET (1 << 9) #define UHCI_PORT_LSDA (1 << 8) +#define UHCI_PORT_RSVD1 (1 << 7) #define UHCI_PORT_RD (1 << 6) #define UHCI_PORT_ENC (1 << 3) #define UHCI_PORT_EN (1 << 2) -- 1.8.3.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [Qemu-devel] [PATCH 4/5] usb: move ehci register defines to header file 2014-05-26 8:56 [Qemu-devel] [PATCH 0/5] usb: improve ehci/uhci test Gerd Hoffmann ` (2 preceding siblings ...) 2014-05-26 8:56 ` [Qemu-devel] [PATCH 3/5] usb: add uhci port status reserved bit Gerd Hoffmann @ 2014-05-26 8:56 ` Gerd Hoffmann 2014-05-26 8:56 ` [Qemu-devel] [PATCH 5/5] usb: improve ehci/uhci test Gerd Hoffmann 4 siblings, 0 replies; 6+ messages in thread From: Gerd Hoffmann @ 2014-05-26 8:56 UTC (permalink / raw) To: qemu-devel; +Cc: Gerd Hoffmann So we can easily use them in tests. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> --- hw/usb/hcd-ehci.c | 79 +------------------------------------------- include/hw/usb/ehci-regs.h | 82 ++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 83 insertions(+), 78 deletions(-) create mode 100644 include/hw/usb/ehci-regs.h diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c index a3ae9f2..a00a93c 100644 --- a/hw/usb/hcd-ehci.c +++ b/hw/usb/hcd-ehci.c @@ -27,87 +27,10 @@ * along with this program; if not, see <http://www.gnu.org/licenses/>. */ +#include "hw/usb/ehci-regs.h" #include "hw/usb/hcd-ehci.h" #include "trace.h" -/* Capability Registers Base Address - section 2.2 */ -#define CAPLENGTH 0x0000 /* 1-byte, 0x0001 reserved */ -#define HCIVERSION 0x0002 /* 2-bytes, i/f version # */ -#define HCSPARAMS 0x0004 /* 4-bytes, structural params */ -#define HCCPARAMS 0x0008 /* 4-bytes, capability params */ -#define EECP HCCPARAMS + 1 -#define HCSPPORTROUTE1 0x000c -#define HCSPPORTROUTE2 0x0010 - -#define USBCMD 0x0000 -#define USBCMD_RUNSTOP (1 << 0) // run / Stop -#define USBCMD_HCRESET (1 << 1) // HC Reset -#define USBCMD_FLS (3 << 2) // Frame List Size -#define USBCMD_FLS_SH 2 // Frame List Size Shift -#define USBCMD_PSE (1 << 4) // Periodic Schedule Enable -#define USBCMD_ASE (1 << 5) // Asynch Schedule Enable -#define USBCMD_IAAD (1 << 6) // Int Asynch Advance Doorbell -#define USBCMD_LHCR (1 << 7) // Light Host Controller Reset -#define USBCMD_ASPMC (3 << 8) // Async Sched Park Mode Count -#define USBCMD_ASPME (1 << 11) // Async Sched Park Mode Enable -#define USBCMD_ITC (0x7f << 16) // Int Threshold Control -#define USBCMD_ITC_SH 16 // Int Threshold Control Shift - -#define USBSTS 0x0004 -#define USBSTS_RO_MASK 0x0000003f -#define USBSTS_INT (1 << 0) // USB Interrupt -#define USBSTS_ERRINT (1 << 1) // Error Interrupt -#define USBSTS_PCD (1 << 2) // Port Change Detect -#define USBSTS_FLR (1 << 3) // Frame List Rollover -#define USBSTS_HSE (1 << 4) // Host System Error -#define USBSTS_IAA (1 << 5) // Interrupt on Async Advance -#define USBSTS_HALT (1 << 12) // HC Halted -#define USBSTS_REC (1 << 13) // Reclamation -#define USBSTS_PSS (1 << 14) // Periodic Schedule Status -#define USBSTS_ASS (1 << 15) // Asynchronous Schedule Status - -/* - * Interrupt enable bits correspond to the interrupt active bits in USBSTS - * so no need to redefine here. - */ -#define USBINTR 0x0008 -#define USBINTR_MASK 0x0000003f - -#define FRINDEX 0x000c -#define CTRLDSSEGMENT 0x0010 -#define PERIODICLISTBASE 0x0014 -#define ASYNCLISTADDR 0x0018 -#define ASYNCLISTADDR_MASK 0xffffffe0 - -#define CONFIGFLAG 0x0040 - -/* - * Bits that are reserved or are read-only are masked out of values - * written to us by software - */ -#define PORTSC_RO_MASK 0x007001c0 -#define PORTSC_RWC_MASK 0x0000002a -#define PORTSC_WKOC_E (1 << 22) // Wake on Over Current Enable -#define PORTSC_WKDS_E (1 << 21) // Wake on Disconnect Enable -#define PORTSC_WKCN_E (1 << 20) // Wake on Connect Enable -#define PORTSC_PTC (15 << 16) // Port Test Control -#define PORTSC_PTC_SH 16 // Port Test Control shift -#define PORTSC_PIC (3 << 14) // Port Indicator Control -#define PORTSC_PIC_SH 14 // Port Indicator Control Shift -#define PORTSC_POWNER (1 << 13) // Port Owner -#define PORTSC_PPOWER (1 << 12) // Port Power -#define PORTSC_LINESTAT (3 << 10) // Port Line Status -#define PORTSC_LINESTAT_SH 10 // Port Line Status Shift -#define PORTSC_PRESET (1 << 8) // Port Reset -#define PORTSC_SUSPEND (1 << 7) // Port Suspend -#define PORTSC_FPRES (1 << 6) // Force Port Resume -#define PORTSC_OCC (1 << 5) // Over Current Change -#define PORTSC_OCA (1 << 4) // Over Current Active -#define PORTSC_PEDC (1 << 3) // Port Enable/Disable Change -#define PORTSC_PED (1 << 2) // Port Enable/Disable -#define PORTSC_CSC (1 << 1) // Connect Status Change -#define PORTSC_CONNECT (1 << 0) // Current Connect Status - #define FRAME_TIMER_FREQ 1000 #define FRAME_TIMER_NS (1000000000 / FRAME_TIMER_FREQ) #define UFRAME_TIMER_NS (FRAME_TIMER_NS / 8) diff --git a/include/hw/usb/ehci-regs.h b/include/hw/usb/ehci-regs.h new file mode 100644 index 0000000..616f1b8 --- /dev/null +++ b/include/hw/usb/ehci-regs.h @@ -0,0 +1,82 @@ +#ifndef HW_USB_EHCI_REGS_H +#define HW_USB_EHCI_REGS_H 1 + +/* Capability Registers Base Address - section 2.2 */ +#define CAPLENGTH 0x0000 /* 1-byte, 0x0001 reserved */ +#define HCIVERSION 0x0002 /* 2-bytes, i/f version # */ +#define HCSPARAMS 0x0004 /* 4-bytes, structural params */ +#define HCCPARAMS 0x0008 /* 4-bytes, capability params */ +#define EECP HCCPARAMS + 1 +#define HCSPPORTROUTE1 0x000c +#define HCSPPORTROUTE2 0x0010 + +#define USBCMD 0x0000 +#define USBCMD_RUNSTOP (1 << 0) // run / Stop +#define USBCMD_HCRESET (1 << 1) // HC Reset +#define USBCMD_FLS (3 << 2) // Frame List Size +#define USBCMD_FLS_SH 2 // Frame List Size Shift +#define USBCMD_PSE (1 << 4) // Periodic Schedule Enable +#define USBCMD_ASE (1 << 5) // Asynch Schedule Enable +#define USBCMD_IAAD (1 << 6) // Int Asynch Advance Doorbell +#define USBCMD_LHCR (1 << 7) // Light Host Controller Reset +#define USBCMD_ASPMC (3 << 8) // Async Sched Park Mode Count +#define USBCMD_ASPME (1 << 11) // Async Sched Park Mode Enable +#define USBCMD_ITC (0x7f << 16) // Int Threshold Control +#define USBCMD_ITC_SH 16 // Int Threshold Control Shift + +#define USBSTS 0x0004 +#define USBSTS_RO_MASK 0x0000003f +#define USBSTS_INT (1 << 0) // USB Interrupt +#define USBSTS_ERRINT (1 << 1) // Error Interrupt +#define USBSTS_PCD (1 << 2) // Port Change Detect +#define USBSTS_FLR (1 << 3) // Frame List Rollover +#define USBSTS_HSE (1 << 4) // Host System Error +#define USBSTS_IAA (1 << 5) // Interrupt on Async Advance +#define USBSTS_HALT (1 << 12) // HC Halted +#define USBSTS_REC (1 << 13) // Reclamation +#define USBSTS_PSS (1 << 14) // Periodic Schedule Status +#define USBSTS_ASS (1 << 15) // Asynchronous Schedule Status + +/* + * Interrupt enable bits correspond to the interrupt active bits in USBSTS + * so no need to redefine here. + */ +#define USBINTR 0x0008 +#define USBINTR_MASK 0x0000003f + +#define FRINDEX 0x000c +#define CTRLDSSEGMENT 0x0010 +#define PERIODICLISTBASE 0x0014 +#define ASYNCLISTADDR 0x0018 +#define ASYNCLISTADDR_MASK 0xffffffe0 + +#define CONFIGFLAG 0x0040 + +/* + * Bits that are reserved or are read-only are masked out of values + * written to us by software + */ +#define PORTSC_RO_MASK 0x007001c0 +#define PORTSC_RWC_MASK 0x0000002a +#define PORTSC_WKOC_E (1 << 22) // Wake on Over Current Enable +#define PORTSC_WKDS_E (1 << 21) // Wake on Disconnect Enable +#define PORTSC_WKCN_E (1 << 20) // Wake on Connect Enable +#define PORTSC_PTC (15 << 16) // Port Test Control +#define PORTSC_PTC_SH 16 // Port Test Control shift +#define PORTSC_PIC (3 << 14) // Port Indicator Control +#define PORTSC_PIC_SH 14 // Port Indicator Control Shift +#define PORTSC_POWNER (1 << 13) // Port Owner +#define PORTSC_PPOWER (1 << 12) // Port Power +#define PORTSC_LINESTAT (3 << 10) // Port Line Status +#define PORTSC_LINESTAT_SH 10 // Port Line Status Shift +#define PORTSC_PRESET (1 << 8) // Port Reset +#define PORTSC_SUSPEND (1 << 7) // Port Suspend +#define PORTSC_FPRES (1 << 6) // Force Port Resume +#define PORTSC_OCC (1 << 5) // Over Current Change +#define PORTSC_OCA (1 << 4) // Over Current Active +#define PORTSC_PEDC (1 << 3) // Port Enable/Disable Change +#define PORTSC_PED (1 << 2) // Port Enable/Disable +#define PORTSC_CSC (1 << 1) // Connect Status Change +#define PORTSC_CONNECT (1 << 0) // Current Connect Status + +#endif /* HW_USB_EHCI_REGS_H */ -- 1.8.3.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [Qemu-devel] [PATCH 5/5] usb: improve ehci/uhci test 2014-05-26 8:56 [Qemu-devel] [PATCH 0/5] usb: improve ehci/uhci test Gerd Hoffmann ` (3 preceding siblings ...) 2014-05-26 8:56 ` [Qemu-devel] [PATCH 4/5] usb: move ehci register defines to header file Gerd Hoffmann @ 2014-05-26 8:56 ` Gerd Hoffmann 4 siblings, 0 replies; 6+ messages in thread From: Gerd Hoffmann @ 2014-05-26 8:56 UTC (permalink / raw) To: qemu-devel; +Cc: Gerd Hoffmann * Attach usb devices to the bus. * Check initial port status register state. * Flip ehci initialization bit. * Check port status register state again to see whenever device handover to ehci worked. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> --- tests/Makefile | 4 +- tests/usb-hcd-ehci-test.c | 153 ++++++++++++++++++++++++++++++++++++++++++++-- 2 files changed, 152 insertions(+), 5 deletions(-) diff --git a/tests/Makefile b/tests/Makefile index 9f7ca61..92ad722 100644 --- a/tests/Makefile +++ b/tests/Makefile @@ -152,6 +152,8 @@ gcov-files-i386-y += hw/pci-bridge/ioh3420.c check-qtest-i386-y += tests/usb-hcd-ehci-test$(EXESUF) gcov-files-i386-y += hw/usb/hcd-ehci.c gcov-files-i386-y += hw/usb/hcd-uhci.c +gcov-files-i386-y += hw/usb/dev-hid.c +gcov-files-i386-y += hw/usb/dev-storage.c check-qtest-x86_64-y = $(check-qtest-i386-y) gcov-files-i386-y += i386-softmmu/hw/timer/mc146818rtc.c gcov-files-x86_64-y = $(subst i386-softmmu/,x86_64-softmmu/,$(gcov-files-i386-y)) @@ -317,7 +319,7 @@ tests/ac97-test$(EXESUF): tests/ac97-test.o tests/es1370-test$(EXESUF): tests/es1370-test.o tests/intel-hda-test$(EXESUF): tests/intel-hda-test.o tests/ioh3420-test$(EXESUF): tests/ioh3420-test.o -tests/usb-hcd-ehci-test$(EXESUF): tests/usb-hcd-ehci-test.o +tests/usb-hcd-ehci-test$(EXESUF): tests/usb-hcd-ehci-test.o $(libqos-pc-obj-y) tests/qemu-iotests/socket_scm_helper$(EXESUF): tests/qemu-iotests/socket_scm_helper.o # QTest rules diff --git a/tests/usb-hcd-ehci-test.c b/tests/usb-hcd-ehci-test.c index bc56ba7..bcdf62f 100644 --- a/tests/usb-hcd-ehci-test.c +++ b/tests/usb-hcd-ehci-test.c @@ -9,12 +9,149 @@ #include <glib.h> #include <string.h> +#include <stdio.h> #include "libqtest.h" +#include "libqos/pci-pc.h" #include "qemu/osdep.h" +#include "hw/usb/uhci-regs.h" +#include "hw/usb/ehci-regs.h" -/* Tests only initialization so far. TODO: Replace with functional tests */ -static void pci_nop(void) +struct qhc { + QPCIDevice *dev; + void *base; +}; + +static QPCIBus *pcibus; +static struct qhc uhci1; +static struct qhc uhci2; +static struct qhc uhci3; +static struct qhc ehci1; + +/* helpers */ + +static void pci_init_one(struct qhc *hc, uint32_t devfn, int bar) +{ + hc->dev = qpci_device_find(pcibus, devfn); + g_assert(hc->dev != NULL); + qpci_device_enable(hc->dev); + hc->base = qpci_iomap(hc->dev, bar); + g_assert(hc->base != NULL); +} + +#if 0 +static void uhci_port_update(struct qhc *hc, int port, + uint16_t set, uint16_t clear) { + void *addr = hc->base + 0x10 + 2 * port; + uint16_t value; + + value = qpci_io_readw(hc->dev, addr); + value |= set; + value &= ~clear; + qpci_io_writew(hc->dev, addr, value); +} +#endif + +static void uhci_port_test(struct qhc *hc, int port, uint16_t expect) +{ + void *addr = hc->base + 0x10 + 2 * port; + uint16_t value = qpci_io_readw(hc->dev, addr); + uint16_t mask = ~(UHCI_PORT_WRITE_CLEAR | UHCI_PORT_RSVD1); + +#if 0 + fprintf(stderr, "%s: %d, have 0x%04x, want 0x%04x\n", + __func__, port, value & mask, expect & mask); +#endif + g_assert((value & mask) == (expect & mask)); +} + +static void ehci_port_test(struct qhc *hc, int port, uint32_t expect) +{ + void *addr = hc->base + 0x64 + 4 * port; + uint32_t value = qpci_io_readl(hc->dev, addr); + uint16_t mask = ~(PORTSC_CSC | PORTSC_PEDC | PORTSC_OCC); + +#if 0 + fprintf(stderr, "%s: %d, have 0x%08x, want 0x%08x\n", + __func__, port, value & mask, expect & mask); +#endif + g_assert((value & mask) == (expect & mask)); +} + +/* tests */ + +static void pci_init(void) +{ + if (pcibus) { + return; + } + pcibus = qpci_init_pc(); + g_assert(pcibus != NULL); + + pci_init_one(&uhci1, QPCI_DEVFN(0x1d, 0), 4); + pci_init_one(&uhci2, QPCI_DEVFN(0x1d, 1), 4); + pci_init_one(&uhci3, QPCI_DEVFN(0x1d, 2), 4); + pci_init_one(&ehci1, QPCI_DEVFN(0x1d, 7), 0); +} + +static void pci_uhci_port_1(void) +{ + g_assert(pcibus != NULL); + + uhci_port_test(&uhci1, 0, UHCI_PORT_CCS); /* usb-tablet */ + uhci_port_test(&uhci1, 1, UHCI_PORT_CCS); /* usb-storage */ + uhci_port_test(&uhci2, 0, 0); + uhci_port_test(&uhci2, 1, 0); + uhci_port_test(&uhci3, 0, 0); + uhci_port_test(&uhci3, 1, 0); +} + +static void pci_ehci_port_1(void) +{ + int i; + + g_assert(pcibus != NULL); + + for (i = 0; i < 6; i++) { + ehci_port_test(&ehci1, i, PORTSC_POWNER | PORTSC_PPOWER); + } +} + +static void pci_ehci_config(void) +{ + /* hands over all ports from companion uhci to ehci */ + qpci_io_writew(ehci1.dev, ehci1.base + 0x60, 1); +} + +static void pci_uhci_port_2(void) +{ + g_assert(pcibus != NULL); + + uhci_port_test(&uhci1, 0, 0); /* usb-tablet, @ehci */ + uhci_port_test(&uhci1, 1, 0); /* usb-storage, @ehci */ + uhci_port_test(&uhci2, 0, 0); + uhci_port_test(&uhci2, 1, 0); + uhci_port_test(&uhci3, 0, 0); + uhci_port_test(&uhci3, 1, 0); +} + +static void pci_ehci_port_2(void) +{ + static uint32_t expect[] = { + PORTSC_PPOWER | PORTSC_CONNECT, /* usb-tablet */ + PORTSC_PPOWER | PORTSC_CONNECT, /* usb-storage */ + PORTSC_PPOWER, + PORTSC_PPOWER, + PORTSC_PPOWER, + PORTSC_PPOWER, + }; + int i; + + g_assert(pcibus != NULL); + + for (i = 0; i < 6; i++) { + ehci_port_test(&ehci1, i, expect[i]); + } } int main(int argc, char **argv) @@ -22,7 +159,12 @@ int main(int argc, char **argv) int ret; g_test_init(&argc, &argv, NULL); - qtest_add_func("/ehci/pci/nop", pci_nop); + qtest_add_func("/ehci/pci/init", pci_init); + qtest_add_func("/ehci/pci/uhci-port-1", pci_uhci_port_1); + qtest_add_func("/ehci/pci/ehci-port-1", pci_ehci_port_1); + qtest_add_func("/ehci/pci/ehci-config", pci_ehci_config); + qtest_add_func("/ehci/pci/uhci-port-2", pci_uhci_port_2); + qtest_add_func("/ehci/pci/ehci-port-2", pci_ehci_port_2); qtest_start("-machine q35 -device ich9-usb-ehci1,bus=pcie.0,addr=1d.7," "multifunction=on,id=ich9-ehci-1 " @@ -31,7 +173,10 @@ int main(int argc, char **argv) "-device ich9-usb-uhci2,bus=pcie.0,addr=1d.1," "multifunction=on,masterbus=ich9-ehci-1.0,firstport=2 " "-device ich9-usb-uhci3,bus=pcie.0,addr=1d.2," - "multifunction=on,masterbus=ich9-ehci-1.0,firstport=4"); + "multifunction=on,masterbus=ich9-ehci-1.0,firstport=4 " + "-drive if=none,id=usbcdrom,media=cdrom " + "-device usb-tablet,bus=ich9-ehci-1.0,port=1,usb_version=1 " + "-device usb-storage,bus=ich9-ehci-1.0,port=2,drive=usbcdrom "); ret = g_test_run(); qtest_end(); -- 1.8.3.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
end of thread, other threads:[~2014-05-26 8:57 UTC | newest] Thread overview: 6+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2014-05-26 8:56 [Qemu-devel] [PATCH 0/5] usb: improve ehci/uhci test Gerd Hoffmann 2014-05-26 8:56 ` [Qemu-devel] [PATCH 1/5] qtest: fix qpci_config_writel Gerd Hoffmann 2014-05-26 8:56 ` [Qemu-devel] [PATCH 2/5] usb: move uhci register defines to header file Gerd Hoffmann 2014-05-26 8:56 ` [Qemu-devel] [PATCH 3/5] usb: add uhci port status reserved bit Gerd Hoffmann 2014-05-26 8:56 ` [Qemu-devel] [PATCH 4/5] usb: move ehci register defines to header file Gerd Hoffmann 2014-05-26 8:56 ` [Qemu-devel] [PATCH 5/5] usb: improve ehci/uhci test Gerd Hoffmann
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