From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51613) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WsYZJ-0007Ex-PR for qemu-devel@nongnu.org; Thu, 05 Jun 2014 10:23:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WsYZA-00006D-8i for qemu-devel@nongnu.org; Thu, 05 Jun 2014 10:23:01 -0400 Received: from mail-we0-x22a.google.com ([2a00:1450:400c:c03::22a]:60547) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WsYZA-00005o-0Q for qemu-devel@nongnu.org; Thu, 05 Jun 2014 10:22:52 -0400 Received: by mail-we0-f170.google.com with SMTP id u57so1219696wes.15 for ; Thu, 05 Jun 2014 07:22:51 -0700 (PDT) Received: from playground.station (net-37-117-132-7.cust.vodafonedsl.it. [37.117.132.7]) by mx.google.com with ESMTPSA id p9sm14884136eeg.32.2014.06.05.07.22.48 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 05 Jun 2014 07:22:49 -0700 (PDT) Sender: Paolo Bonzini From: Paolo Bonzini Date: Thu, 5 Jun 2014 16:22:05 +0200 Message-Id: <1401978143-11896-16-git-send-email-pbonzini@redhat.com> In-Reply-To: <1401978143-11896-1-git-send-email-pbonzini@redhat.com> References: <1401978143-11896-1-git-send-email-pbonzini@redhat.com> Subject: [Qemu-devel] [PULL 15/33] target-i386: move check_io helpers to seg_helper.c List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Prepare for adding _kernel accessors there in the next patch. Signed-off-by: Paolo Bonzini --- target-i386/misc_helper.c | 42 ------------------------------------------ target-i386/seg_helper.c | 42 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 42 insertions(+), 42 deletions(-) diff --git a/target-i386/misc_helper.c b/target-i386/misc_helper.c index 4f1e30f..4aaf1e4 100644 --- a/target-i386/misc_helper.c +++ b/target-i386/misc_helper.c @@ -22,48 +22,6 @@ #include "exec/helper-proto.h" #include "exec/cpu_ldst.h" -/* check if Port I/O is allowed in TSS */ -static inline void check_io(CPUX86State *env, int addr, int size) -{ - int io_offset, val, mask; - - /* TSS must be a valid 32 bit one */ - if (!(env->tr.flags & DESC_P_MASK) || - ((env->tr.flags >> DESC_TYPE_SHIFT) & 0xf) != 9 || - env->tr.limit < 103) { - goto fail; - } - io_offset = cpu_lduw_kernel(env, env->tr.base + 0x66); - io_offset += (addr >> 3); - /* Note: the check needs two bytes */ - if ((io_offset + 1) > env->tr.limit) { - goto fail; - } - val = cpu_lduw_kernel(env, env->tr.base + io_offset); - val >>= (addr & 7); - mask = (1 << size) - 1; - /* all bits must be zero to allow the I/O */ - if ((val & mask) != 0) { - fail: - raise_exception_err(env, EXCP0D_GPF, 0); - } -} - -void helper_check_iob(CPUX86State *env, uint32_t t0) -{ - check_io(env, t0, 1); -} - -void helper_check_iow(CPUX86State *env, uint32_t t0) -{ - check_io(env, t0, 2); -} - -void helper_check_iol(CPUX86State *env, uint32_t t0) -{ - check_io(env, t0, 4); -} - void helper_outb(uint32_t port, uint32_t data) { cpu_outb(port, data & 0xff); diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c index ba47215..31c5508 100644 --- a/target-i386/seg_helper.c +++ b/target-i386/seg_helper.c @@ -2469,3 +2469,45 @@ void cpu_x86_load_seg(CPUX86State *env, int seg_reg, int selector) } } #endif + +/* check if Port I/O is allowed in TSS */ +static inline void check_io(CPUX86State *env, int addr, int size) +{ + int io_offset, val, mask; + + /* TSS must be a valid 32 bit one */ + if (!(env->tr.flags & DESC_P_MASK) || + ((env->tr.flags >> DESC_TYPE_SHIFT) & 0xf) != 9 || + env->tr.limit < 103) { + goto fail; + } + io_offset = cpu_lduw_kernel(env, env->tr.base + 0x66); + io_offset += (addr >> 3); + /* Note: the check needs two bytes */ + if ((io_offset + 1) > env->tr.limit) { + goto fail; + } + val = cpu_lduw_kernel(env, env->tr.base + io_offset); + val >>= (addr & 7); + mask = (1 << size) - 1; + /* all bits must be zero to allow the I/O */ + if ((val & mask) != 0) { + fail: + raise_exception_err(env, EXCP0D_GPF, 0); + } +} + +void helper_check_iob(CPUX86State *env, uint32_t t0) +{ + check_io(env, t0, 1); +} + +void helper_check_iow(CPUX86State *env, uint32_t t0) +{ + check_io(env, t0, 2); +} + +void helper_check_iol(CPUX86State *env, uint32_t t0) +{ + check_io(env, t0, 4); +} -- 1.8.3.1