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From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 20/33] target-i386: commonize checks for 4MB and 4KB pages
Date: Thu,  5 Jun 2014 16:22:10 +0200	[thread overview]
Message-ID: <1401978143-11896-21-git-send-email-pbonzini@redhat.com> (raw)
In-Reply-To: <1401978143-11896-1-git-send-email-pbonzini@redhat.com>

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 target-i386/helper.c | 118 ++++++++++++++++++---------------------------------
 1 file changed, 41 insertions(+), 77 deletions(-)

diff --git a/target-i386/helper.c b/target-i386/helper.c
index cf18336..5842531 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -716,47 +716,9 @@ int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr,
         /* if PSE bit is set, then we use a 4MB page */
         if ((pde & PG_PSE_MASK) && (env->cr[4] & CR4_PSE_MASK)) {
             page_size = 4096 * 1024;
-            switch (mmu_idx) {
-            case MMU_USER_IDX:
-                if (!(pde & PG_USER_MASK)) {
-                    goto do_fault_protect;
-                }
-                if (is_write && !(pde & PG_RW_MASK)) {
-                    goto do_fault_protect;
-                }
-                break;
-
-            case MMU_KSMAP_IDX:
-                if (is_write1 != 2 && (pde & PG_USER_MASK)) {
-                    goto do_fault_protect;
-                }
-                /* fall through */
-            case MMU_KNOSMAP_IDX:
-                if (is_write1 == 2 && (env->cr[4] & CR4_SMEP_MASK) &&
-                    (pde & PG_USER_MASK)) {
-                    goto do_fault_protect;
-                }
-                if ((env->cr[0] & CR0_WP_MASK) &&
-                    is_write && !(pde & PG_RW_MASK)) {
-                    goto do_fault_protect;
-                }
-                break;
-
-            default: /* cannot happen */
-                break;
-            }
-            is_dirty = is_write && !(pde & PG_DIRTY_MASK);
-            if (!(pde & PG_ACCESSED_MASK) || is_dirty) {
-                pde |= PG_ACCESSED_MASK;
-                if (is_dirty) {
-                    pde |= PG_DIRTY_MASK;
-                }
-                stl_phys_notdirty(cs->as, pde_addr, pde);
-            }
-
-            pte = pde & ~((page_size - 1) & ~0xfff); /* align to page_size */
-            ptep = pte;
-            virt_addr = addr & ~(page_size - 1);
+            ptep = pde;
+            pte_addr = pde_addr;
+            pte = pde;
         } else {
             if (!(pde & PG_ACCESSED_MASK)) {
                 pde |= PG_ACCESSED_MASK;
@@ -773,46 +735,48 @@ int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr,
             }
             /* combine pde and pte user and rw protections */
             ptep = pte & pde;
-            switch (mmu_idx) {
-            case MMU_USER_IDX:
-                if (!(ptep & PG_USER_MASK)) {
-                    goto do_fault_protect;
-                }
-                if (is_write && !(ptep & PG_RW_MASK)) {
-                    goto do_fault_protect;
-                }
-                break;
-
-            case MMU_KSMAP_IDX:
-                if (is_write1 != 2 && (ptep & PG_USER_MASK)) {
-                    goto do_fault_protect;
-                }
-                /* fall through */
-            case MMU_KNOSMAP_IDX:
-                if (is_write1 == 2 && (env->cr[4] & CR4_SMEP_MASK) &&
-                    (ptep & PG_USER_MASK)) {
-                    goto do_fault_protect;
-                }
-                if ((env->cr[0] & CR0_WP_MASK) &&
-                    is_write && !(ptep & PG_RW_MASK)) {
-                    goto do_fault_protect;
-                }
-                break;
+            page_size = 4096;
+        }
+        switch (mmu_idx) {
+        case MMU_USER_IDX:
+            if (!(ptep & PG_USER_MASK)) {
+                goto do_fault_protect;
+            }
+            if (is_write && !(ptep & PG_RW_MASK)) {
+                goto do_fault_protect;
+            }
+            break;
 
-            default: /* cannot happen */
-                break;
+        case MMU_KSMAP_IDX:
+            if (is_write1 != 2 && (ptep & PG_USER_MASK)) {
+                goto do_fault_protect;
             }
-            is_dirty = is_write && !(pte & PG_DIRTY_MASK);
-            if (!(pte & PG_ACCESSED_MASK) || is_dirty) {
-                pte |= PG_ACCESSED_MASK;
-                if (is_dirty) {
-                    pte |= PG_DIRTY_MASK;
-                }
-                stl_phys_notdirty(cs->as, pte_addr, pte);
+            /* fall through */
+        case MMU_KNOSMAP_IDX:
+            if (is_write1 == 2 && (env->cr[4] & CR4_SMEP_MASK) &&
+                (ptep & PG_USER_MASK)) {
+                goto do_fault_protect;
             }
-            page_size = 4096;
-            virt_addr = addr & ~0xfff;
+            if ((env->cr[0] & CR0_WP_MASK) &&
+                is_write && !(ptep & PG_RW_MASK)) {
+                goto do_fault_protect;
+            }
+            break;
+
+        default: /* cannot happen */
+            break;
+        }
+        is_dirty = is_write && !(pte & PG_DIRTY_MASK);
+        if (!(pte & PG_ACCESSED_MASK) || is_dirty) {
+            pte |= PG_ACCESSED_MASK;
+            if (is_dirty) {
+                pte |= PG_DIRTY_MASK;
+            }
+            stl_phys_notdirty(cs->as, pte_addr, pte);
         }
+        /* align to page_size */
+        pte &= ~((page_size - 1) & ~0xfff);
+        virt_addr = addr & ~(page_size - 1);
     }
     /* the page can be put in the TLB */
     prot = PAGE_READ;
-- 
1.8.3.1

  parent reply	other threads:[~2014-06-05 14:23 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-06-05 14:21 [Qemu-devel] [PULL 00/33] softmmu cleanups and target-i386 paging fixes Paolo Bonzini
2014-06-05 14:21 ` [Qemu-devel] [PULL 01/33] cputlb: Fix regression with TCG interpreter (bug 1310324) Paolo Bonzini
2014-06-05 14:21 ` [Qemu-devel] [PULL 02/33] nseries: clean up coding style Paolo Bonzini
2014-06-05 14:21 ` [Qemu-devel] [PULL 03/33] hw: use ld_p/st_p instead of ld_raw/st_raw Paolo Bonzini
2014-06-05 14:21 ` [Qemu-devel] [PULL 04/33] softmmu: start introducing SOFTMMU_CODE_ACCESS in softmmu_header.h Paolo Bonzini
2014-06-05 14:21 ` [Qemu-devel] [PULL 05/33] softmmu: move MMUSUFFIX under SOFTMMU_CODE_ACCESS Paolo Bonzini
2014-06-05 14:21 ` [Qemu-devel] [PULL 06/33] softmmu: move definition of CPU_MMU_INDEX to inclusion site, drop ACCESS_TYPE Paolo Bonzini
2014-06-05 14:21 ` [Qemu-devel] [PULL 07/33] softmmu: make do_unaligned_access a method of CPU Paolo Bonzini
2014-06-05 14:21 ` [Qemu-devel] [PULL 08/33] softmmu: move ALIGNED_ONLY to cpu.h Paolo Bonzini
2014-06-05 14:21 ` [Qemu-devel] [PULL 09/33] softmmu: commonize helper definitions Paolo Bonzini
2014-06-05 14:22 ` [Qemu-devel] [PULL 10/33] softmmu: move softmmu_template.h out of include/ Paolo Bonzini
2014-06-05 14:22 ` [Qemu-devel] [PULL 11/33] target-arm: move arm_*_code to a separate file Paolo Bonzini
2014-06-05 14:22 ` [Qemu-devel] [PULL 12/33] softmmu: introduce cpu_ldst.h Paolo Bonzini
2014-06-05 14:22 ` [Qemu-devel] [PULL 13/33] softmmu: move all load/store functions to cpu_ldst.h Paolo Bonzini
2014-06-05 14:22 ` [Qemu-devel] [PULL 14/33] target-i386: rename KSMAP to KNOSMAP Paolo Bonzini
2014-06-05 14:22 ` [Qemu-devel] [PULL 15/33] target-i386: move check_io helpers to seg_helper.c Paolo Bonzini
2014-06-05 14:22 ` [Qemu-devel] [PULL 16/33] target-i386: fix kernel accesses with SMAP and CPL = 3 Paolo Bonzini
2014-06-05 14:22 ` [Qemu-devel] [PULL 17/33] target-i386: simplify SMAP handling in MMU_KSMAP_IDX Paolo Bonzini
2014-06-05 14:22 ` [Qemu-devel] [PULL 18/33] target-i386: fix coding standards in x86_cpu_handle_mmu_fault Paolo Bonzini
2014-06-05 14:22 ` [Qemu-devel] [PULL 19/33] target-i386: commonize checks for 2MB and 4KB pages Paolo Bonzini
2014-06-05 14:22 ` Paolo Bonzini [this message]
2014-06-05 14:22 ` [Qemu-devel] [PULL 21/33] target-i386: commonize checks for PAE and non-PAE Paolo Bonzini
2014-06-05 14:22 ` [Qemu-devel] [PULL 22/33] target-i386: tweak handling of PG_NX_MASK Paolo Bonzini
2014-06-05 14:22 ` [Qemu-devel] [PULL 23/33] target-i386: introduce do_check_protect label Paolo Bonzini
2014-06-05 14:22 ` [Qemu-devel] [PULL 24/33] target-i386: introduce support for 1 GB pages Paolo Bonzini
2014-06-05 14:22 ` [Qemu-devel] [PULL 25/33] target-i386: set correct error code for reserved bit access Paolo Bonzini
2014-06-05 14:22 ` [Qemu-devel] [PULL 26/33] target-i386: test reserved PS bit on PML4Es Paolo Bonzini
2014-06-05 14:22 ` [Qemu-devel] [PULL 27/33] target-i386: raise page fault for reserved physical address bits Paolo Bonzini
2014-06-05 14:22 ` [Qemu-devel] [PULL 28/33] target-i386: simplify pte/vaddr calculation Paolo Bonzini
2014-06-05 14:22 ` [Qemu-devel] [PULL 29/33] target-i386: unify reserved bits and NX bit check Paolo Bonzini
2014-06-05 14:22 ` [Qemu-devel] [PULL 30/33] target-i386: raise page fault for reserved bits in large pages Paolo Bonzini
2014-06-05 14:22 ` [Qemu-devel] [PULL 31/33] target-i386: support long addresses for 4MB pages (PSE-36) Paolo Bonzini
2014-06-05 14:22 ` [Qemu-devel] [PULL 32/33] target-i386: fix protection bits in the TLB for SMEP Paolo Bonzini
2014-06-05 14:22 ` [Qemu-devel] [PULL 33/33] target-i386: cleanup x86_cpu_get_phys_page_debug Paolo Bonzini
2014-06-05 20:50 ` [Qemu-devel] [PULL 00/33] softmmu cleanups and target-i386 paging fixes Peter Maydell

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