From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51754) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WsYZU-0007cs-Op for qemu-devel@nongnu.org; Thu, 05 Jun 2014 10:23:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WsYZK-0000Aj-Gx for qemu-devel@nongnu.org; Thu, 05 Jun 2014 10:23:12 -0400 Received: from mail-wi0-x236.google.com ([2a00:1450:400c:c05::236]:63506) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WsYZK-0000AN-Ac for qemu-devel@nongnu.org; Thu, 05 Jun 2014 10:23:02 -0400 Received: by mail-wi0-f182.google.com with SMTP id r20so3599479wiv.3 for ; Thu, 05 Jun 2014 07:23:01 -0700 (PDT) Received: from playground.station (net-37-117-132-7.cust.vodafonedsl.it. [37.117.132.7]) by mx.google.com with ESMTPSA id p9sm14884136eeg.32.2014.06.05.07.23.00 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 05 Jun 2014 07:23:00 -0700 (PDT) Sender: Paolo Bonzini From: Paolo Bonzini Date: Thu, 5 Jun 2014 16:22:14 +0200 Message-Id: <1401978143-11896-25-git-send-email-pbonzini@redhat.com> In-Reply-To: <1401978143-11896-1-git-send-email-pbonzini@redhat.com> References: <1401978143-11896-1-git-send-email-pbonzini@redhat.com> Subject: [Qemu-devel] [PULL 24/33] target-i386: introduce support for 1 GB pages List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Given the simplifications to the code in the previous patches, this is now very simple to do. Signed-off-by: Paolo Bonzini --- target-i386/cpu.c | 4 +--- target-i386/helper.c | 7 +++++++ 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 042a48d..0f400d4 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -569,9 +569,7 @@ struct X86CPUDefinition { CPUID_EXT_RDRAND */ #define TCG_EXT2_FEATURES ((TCG_FEATURES & CPUID_EXT2_AMD_ALIASES) | \ CPUID_EXT2_NX | CPUID_EXT2_MMXEXT | CPUID_EXT2_RDTSCP | \ - CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT) - /* missing: - CPUID_EXT2_PDPE1GB */ + CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT | CPUID_EXT2_PDPE1GB) #define TCG_EXT3_FEATURES (CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM | \ CPUID_EXT3_CR8LEG | CPUID_EXT3_ABM | CPUID_EXT3_SSE4A) #define TCG_SVM_FEATURES 0 diff --git a/target-i386/helper.c b/target-i386/helper.c index d09e1c8..5a50364 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -605,6 +605,13 @@ int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr, pdpe |= PG_ACCESSED_MASK; stl_phys_notdirty(cs->as, pdpe_addr, pdpe); } + if (pdpe & PG_PSE_MASK) { + /* 1 GB page */ + page_size = 1024 * 1024 * 1024; + pte_addr = pdpe_addr; + pte = pdpe; + goto do_check_protect; + } } else #endif { -- 1.8.3.1