From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51820) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WsYZa-0007pt-MI for qemu-devel@nongnu.org; Thu, 05 Jun 2014 10:23:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WsYZQ-0000DK-DU for qemu-devel@nongnu.org; Thu, 05 Jun 2014 10:23:18 -0400 Received: from mail-we0-x22f.google.com ([2a00:1450:400c:c03::22f]:56135) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WsYZQ-0000Cw-7d for qemu-devel@nongnu.org; Thu, 05 Jun 2014 10:23:08 -0400 Received: by mail-we0-f175.google.com with SMTP id p10so1219819wes.34 for ; Thu, 05 Jun 2014 07:23:07 -0700 (PDT) Received: from playground.station (net-37-117-132-7.cust.vodafonedsl.it. [37.117.132.7]) by mx.google.com with ESMTPSA id p9sm14884136eeg.32.2014.06.05.07.23.06 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 05 Jun 2014 07:23:06 -0700 (PDT) Sender: Paolo Bonzini From: Paolo Bonzini Date: Thu, 5 Jun 2014 16:22:19 +0200 Message-Id: <1401978143-11896-30-git-send-email-pbonzini@redhat.com> In-Reply-To: <1401978143-11896-1-git-send-email-pbonzini@redhat.com> References: <1401978143-11896-1-git-send-email-pbonzini@redhat.com> Subject: [Qemu-devel] [PULL 29/33] target-i386: unify reserved bits and NX bit check List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Signed-off-by: Paolo Bonzini --- target-i386/helper.c | 16 ++++------------ 1 file changed, 4 insertions(+), 12 deletions(-) diff --git a/target-i386/helper.c b/target-i386/helper.c index 153a91b..a2e8bd1 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -549,6 +549,10 @@ int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr, goto do_mapping; } + if (!(env->efer & MSR_EFER_NXE)) { + rsvd_mask |= PG_NX_MASK; + } + if (env->cr[4] & CR4_PAE_MASK) { uint64_t pde, pdpe; target_ulong pdpe_addr; @@ -575,9 +579,6 @@ int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr, if (pml4e & (rsvd_mask | PG_PSE_MASK)) { goto do_fault_rsvd; } - if (!(env->efer & MSR_EFER_NXE) && (pml4e & PG_NX_MASK)) { - goto do_fault_rsvd; - } if (!(pml4e & PG_ACCESSED_MASK)) { pml4e |= PG_ACCESSED_MASK; stl_phys_notdirty(cs->as, pml4e_addr, pml4e); @@ -592,9 +593,6 @@ int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr, if (pdpe & rsvd_mask) { goto do_fault_rsvd; } - if (!(env->efer & MSR_EFER_NXE) && (pdpe & PG_NX_MASK)) { - goto do_fault_rsvd; - } ptep &= pdpe ^ PG_NX_MASK; if (!(pdpe & PG_ACCESSED_MASK)) { pdpe |= PG_ACCESSED_MASK; @@ -633,9 +631,6 @@ int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr, if (pde & rsvd_mask) { goto do_fault_rsvd; } - if (!(env->efer & MSR_EFER_NXE) && (pde & PG_NX_MASK)) { - goto do_fault_rsvd; - } ptep &= pde ^ PG_NX_MASK; if (pde & PG_PSE_MASK) { /* 2 MB page */ @@ -658,9 +653,6 @@ int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr, if (pte & rsvd_mask) { goto do_fault_rsvd; } - if (!(env->efer & MSR_EFER_NXE) && (pte & PG_NX_MASK)) { - goto do_fault_rsvd; - } /* combine pde and pte nx, user and rw protections */ ptep &= pte ^ PG_NX_MASK; page_size = 4096; -- 1.8.3.1