From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 01/20] vexpress: Add support for the -bios flag to provide firmware
Date: Mon, 9 Jun 2014 15:57:19 +0100 [thread overview]
Message-ID: <1402325858-23615-2-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1402325858-23615-1-git-send-email-peter.maydell@linaro.org>
From: Grant Likely <grant.likely@linaro.org>
Right now to run firmware inside the QEMU VExpress model requires
padding out the firmware image to the size of the virtual flash and
passing it in via the -pflash argument. If the firmware image is passed
without padding, then QEMU will fail. Also, when passed as a -pflash
argument, QEMU treats the file as persistent storage and will modify the
file.
The -bios flag provides the semantics that we want for providing a
firmware image. This patch maps the contents of the -bios file into the
address space at the boot flash location.
Tested with the vexpress-a15 model and the Tianocore port.
Signed-off-by: Grant Likely <grant.likely@linaro.org>
Tested-by: Roy Franz <roy.franz@linaro.org>
[PMM: folded long line, removed stray \n from error message,
use correct variable for printing image name, exit(1) rather than 0]
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/vexpress.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c
index 33ff422..f311595 100644
--- a/hw/arm/vexpress.c
+++ b/hw/arm/vexpress.c
@@ -28,6 +28,7 @@
#include "net/net.h"
#include "sysemu/sysemu.h"
#include "hw/boards.h"
+#include "hw/loader.h"
#include "exec/address-spaces.h"
#include "sysemu/blockdev.h"
#include "hw/block/flash.h"
@@ -528,6 +529,18 @@ static void vexpress_common_init(VEDBoardInfo *daughterboard,
daughterboard->init(daughterboard, machine->ram_size, machine->cpu_model,
pic);
+ /*
+ * If a bios file was provided, attempt to map it into memory
+ */
+ if (bios_name) {
+ const char *fn = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
+ if (!fn || load_image_targphys(fn, map[VE_NORFLASH0],
+ VEXPRESS_FLASH_SIZE) < 0) {
+ error_report("Could not load ROM image '%s'", bios_name);
+ exit(1);
+ }
+ }
+
/* Motherboard peripherals: the wiring is the same but the
* addresses vary between the legacy and A-Series memory maps.
*/
--
1.9.2
next prev parent reply other threads:[~2014-06-09 14:57 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-09 14:57 [Qemu-devel] [PULL 00/20] target-arm queue Peter Maydell
2014-06-09 14:57 ` Peter Maydell [this message]
2014-06-09 14:57 ` [Qemu-devel] [PULL 02/20] target-arm/cpu64.c: Actually register Cortex-A57 impdef registers Peter Maydell
2014-06-09 14:57 ` [Qemu-devel] [PULL 03/20] target-arm: Prepare cpreg writefns/readfns for EL3/SecExt Peter Maydell
2014-06-09 14:57 ` [Qemu-devel] [PULL 04/20] target-arm: implement PD0/PD1 bits for TTBCR Peter Maydell
2014-06-09 14:57 ` [Qemu-devel] [PULL 05/20] target-arm: Correct handling of UXN bit in ARMv8 LPAE page tables Peter Maydell
2014-06-09 14:57 ` [Qemu-devel] [PULL 06/20] target-arm: add support for v8 SHA1 and SHA256 instructions Peter Maydell
2014-06-09 14:57 ` [Qemu-devel] [PULL 07/20] target-arm: Allow 3reg_wide undefreq to encode more bad size options Peter Maydell
2014-06-09 14:57 ` [Qemu-devel] [PULL 08/20] target-arm: add support for v8 VMULL.P64 instruction Peter Maydell
2014-06-09 14:57 ` [Qemu-devel] [PULL 09/20] target-arm: A64: Use PMULL feature bit for PMULL Peter Maydell
2014-06-09 14:57 ` [Qemu-devel] [PULL 10/20] target-arm: arm_any_initfn() should never set ARM_FEATURE_AARCH64 Peter Maydell
2014-06-09 14:57 ` [Qemu-devel] [PULL 11/20] target-arm: Remove unnecessary setting of feature bits Peter Maydell
2014-06-09 14:57 ` [Qemu-devel] [PULL 12/20] target-arm: Clean up handling of ARMv8 optional " Peter Maydell
2014-06-09 14:57 ` [Qemu-devel] [PULL 13/20] target-arm: VFPv4 implies half-precision extension Peter Maydell
2014-06-09 14:57 ` [Qemu-devel] [PULL 14/20] target-arm: A64: Implement CRC instructions Peter Maydell
2014-06-09 14:57 ` [Qemu-devel] [PULL 15/20] target-arm: A32/T32: Mask CRC value in calling code, not helper Peter Maydell
2014-06-09 14:57 ` [Qemu-devel] [PULL 16/20] target-arm: A64: Implement AES instructions Peter Maydell
2014-06-09 14:57 ` [Qemu-devel] [PULL 17/20] target-arm: A64: Implement 3-register SHA instructions Peter Maydell
2014-06-09 14:57 ` [Qemu-devel] [PULL 18/20] target-arm: A64: Implement two-register " Peter Maydell
2014-06-09 14:57 ` [Qemu-devel] [PULL 19/20] target-arm: Fix errors in writes to generic timer control registers Peter Maydell
2014-06-09 14:57 ` [Qemu-devel] [PULL 20/20] target-arm: Delete unused iwmmxt_msadb helper Peter Maydell
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