From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: qemu-devel@nongnu.org, peter.maydell@linaro.org
Cc: rob.herring@linaro.org, peter.crosthwaite@xilinx.com,
aggelerf@ethz.ch, agraf@suse.de, blauwirbel@gmail.com,
john.williams@xilinx.com, greg.bellows@linaro.org,
pbonzini@redhat.com, alex.bennee@linaro.org,
christoffer.dall@linaro.org, rth@twiddle.net
Subject: [Qemu-devel] [PATCH v2 00/17] target-arm: Parts of the AArch64 EL2/3 exception model
Date: Tue, 10 Jun 2014 01:04:12 +1000 [thread overview]
Message-ID: <1402326269-8573-1-git-send-email-edgar.iglesias@gmail.com> (raw)
From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
Hi,
This is a second round of AArch64 EL2/3 patches working on the exception
model. Among other things adding HVC/SMC, interrupt routing to EL2/3 and
Virtual IRQs/FIQs. The VIRQ/VFIQ support only adds the external signal
delivery method.
Patch 3 is a bug fix.
Patch 14 fails checkpatch, seems like a bug in checkpatch, CC:d Blue.
This conflicts slightly with the PSCI emulation patches that Rob posted.
A rebase should be trivial, hooking in the PSCI emulation calls in the
HVC/SMC helpers.
Cheers,
Edgar
v1 -> v2:
* Avoid imm16 mask in syndrome generation
* Use g_assert_not_reached() in arm_excp_unmasked()
* Avoid some logic duplication in arm_excp_target_el and arm_excp_unmasked.
* Put arm_excp_target_el in helper.c to start with.
* Fix SMC disable (SMD or SCD) for ARMv7 only applies if EL2 exists
* SCR_RES0_MASK -> SCR_MASK
* HCR_RES0_MASK -> HCR_MASK
* Fix SMC routing to EL2, only applies for NS EL1.
* Fix CPreg defs for ESR_EL2/3
* Fix SMC helper, SMC routing to EL2 and SCR.SMD for AArch32.
Edgar E. Iglesias (17):
target-arm: A64: Break out aarch64_save/restore_sp
target-arm: A64: Respect SPSEL in ERET SP restore
target-arm: A64: Respect SPSEL when taking exceptions
target-arm: Make far_el1 an array
target-arm: Add ESR_EL2 and 3
target-arm: Add FAR_EL2 and 3
target-arm: Add HCR_EL2
target-arm: Add SCR_EL3
target-arm: A64: Refactor aarch64_cpu_do_interrupt
target-arm: Break out exception masking to a separate func
target-arm: Don't take interrupts targeting lower ELs
target-arm: A64: Correct updates to FAR and ESR on exceptions
target-arm: Use uint16_t in syndrome generators with 16bit imms
target-arm: A64: Emulate the HVC insn
target-arm: A64: Emulate the SMC insn
target-arm: Add IRQ and FIQ routing to EL2 and 3
target-arm: Add support for VIRQ and VFIQ
cpu-exec.c | 17 +++++-
target-arm/cpu.c | 22 ++++++-
target-arm/cpu.h | 118 ++++++++++++++++++++++++++++++++++++-
target-arm/helper-a64.c | 32 +++++-----
target-arm/helper.c | 144 +++++++++++++++++++++++++++++++++++++++++++--
target-arm/helper.h | 2 +
target-arm/internals.h | 57 +++++++++++++-----
target-arm/kvm64.c | 13 +---
target-arm/op_helper.c | 56 ++++++++++++++++--
target-arm/translate-a64.c | 33 +++++++++--
10 files changed, 428 insertions(+), 66 deletions(-)
--
1.8.3.2
next reply other threads:[~2014-06-09 15:05 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-09 15:04 Edgar E. Iglesias [this message]
2014-06-09 15:04 ` [Qemu-devel] [PATCH v2 01/17] target-arm: A64: Break out aarch64_save/restore_sp Edgar E. Iglesias
2014-06-09 15:04 ` [Qemu-devel] [PATCH v2 02/17] target-arm: A64: Respect SPSEL in ERET SP restore Edgar E. Iglesias
2014-06-09 15:04 ` [Qemu-devel] [PATCH v2 03/17] target-arm: A64: Respect SPSEL when taking exceptions Edgar E. Iglesias
2014-06-09 15:04 ` [Qemu-devel] [PATCH v2 04/17] target-arm: Make far_el1 an array Edgar E. Iglesias
2014-06-11 15:11 ` Greg Bellows
2014-06-09 15:04 ` [Qemu-devel] [PATCH v2 05/17] target-arm: Add ESR_EL2 and 3 Edgar E. Iglesias
2014-06-11 15:13 ` Greg Bellows
2014-06-09 15:04 ` [Qemu-devel] [PATCH v2 06/17] target-arm: Add FAR_EL2 " Edgar E. Iglesias
2014-06-11 15:15 ` Greg Bellows
2014-06-09 15:04 ` [Qemu-devel] [PATCH v2 07/17] target-arm: Add HCR_EL2 Edgar E. Iglesias
2014-06-11 15:48 ` Greg Bellows
2014-06-11 15:58 ` Greg Bellows
2014-06-16 6:36 ` Edgar E. Iglesias
2014-06-09 15:04 ` [Qemu-devel] [PATCH v2 08/17] target-arm: Add SCR_EL3 Edgar E. Iglesias
2014-06-10 22:06 ` Aggeler Fabian
2014-06-11 1:19 ` Edgar E. Iglesias
2014-06-09 15:04 ` [Qemu-devel] [PATCH v2 09/17] target-arm: A64: Refactor aarch64_cpu_do_interrupt Edgar E. Iglesias
2014-06-11 16:51 ` Greg Bellows
2014-06-09 15:04 ` [Qemu-devel] [PATCH v2 10/17] target-arm: Break out exception masking to a separate func Edgar E. Iglesias
2014-06-11 17:16 ` Greg Bellows
2014-06-09 15:04 ` [Qemu-devel] [PATCH v2 11/17] target-arm: Don't take interrupts targeting lower ELs Edgar E. Iglesias
2014-06-11 17:17 ` Greg Bellows
2014-06-09 15:04 ` [Qemu-devel] [PATCH v2 12/17] target-arm: A64: Correct updates to FAR and ESR on exceptions Edgar E. Iglesias
2014-06-11 18:36 ` Greg Bellows
2014-06-09 15:04 ` [Qemu-devel] [PATCH v2 13/17] target-arm: Use uint16_t in syndrome generators with 16bit imms Edgar E. Iglesias
2014-06-11 19:19 ` Greg Bellows
2014-06-11 21:05 ` Peter Maydell
2014-06-11 21:19 ` Greg Bellows
2014-06-16 23:13 ` Edgar E. Iglesias
2014-06-09 15:04 ` [Qemu-devel] [PATCH v2 14/17] target-arm: A64: Emulate the HVC insn Edgar E. Iglesias
2014-06-11 20:14 ` Greg Bellows
2014-06-16 23:28 ` Edgar E. Iglesias
2014-06-09 15:04 ` [Qemu-devel] [PATCH v2 15/17] target-arm: A64: Emulate the SMC insn Edgar E. Iglesias
2014-06-11 21:14 ` Greg Bellows
2014-06-16 6:03 ` Edgar E. Iglesias
2014-06-09 15:04 ` [Qemu-devel] [PATCH v2 16/17] target-arm: Add IRQ and FIQ routing to EL2 and 3 Edgar E. Iglesias
2014-06-11 22:08 ` Greg Bellows
2014-06-09 15:04 ` [Qemu-devel] [PATCH v2 17/17] target-arm: Add support for VIRQ and VFIQ Edgar E. Iglesias
2014-06-11 22:31 ` Greg Bellows
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