* [Qemu-devel] [PATCH V7 1/8] update-linux-headers.sh: Add psci.h to linux header sync-up script
2014-06-16 6:53 [Qemu-devel] [PATCH V7 0/8] PSCI v0.2 support for KVM ARM/ARM64 Pranavkumar Sawargaonkar
@ 2014-06-16 6:53 ` Pranavkumar Sawargaonkar
2014-06-16 6:53 ` [Qemu-devel] [PATCH V7 2/8] linux-headers: Update KVM headers with kvm tree's next branch Pranavkumar Sawargaonkar
` (7 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Pranavkumar Sawargaonkar @ 2014-06-16 6:53 UTC (permalink / raw)
To: qemu-devel
Cc: peter.maydell, Anup Patel, patches, robherring2, kvmarm,
christoffer.dall, Pranavkumar Sawargaonkar
We will be using linux/psci.h for KVM ARM/ARM64 hence add it to
linux header sync-up script.
Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org>
Signed-off-by: Anup Patel <anup.patel@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
---
| 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--git a/scripts/update-linux-headers.sh b/scripts/update-linux-headers.sh
index 120a694..10d7559 100755
--- a/scripts/update-linux-headers.sh
+++ b/scripts/update-linux-headers.sh
@@ -61,7 +61,8 @@ done
rm -rf "$output/linux-headers/linux"
mkdir -p "$output/linux-headers/linux"
-for header in kvm.h kvm_para.h vfio.h vhost.h virtio_config.h virtio_ring.h; do
+for header in kvm.h kvm_para.h psci.h vfio.h vhost.h virtio_config.h \
+ virtio_ring.h; do
cp "$tmpdir/include/linux/$header" "$output/linux-headers/linux"
done
rm -rf "$output/linux-headers/asm-generic"
--
1.9.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [Qemu-devel] [PATCH V7 2/8] linux-headers: Update KVM headers with kvm tree's next branch.
2014-06-16 6:53 [Qemu-devel] [PATCH V7 0/8] PSCI v0.2 support for KVM ARM/ARM64 Pranavkumar Sawargaonkar
2014-06-16 6:53 ` [Qemu-devel] [PATCH V7 1/8] update-linux-headers.sh: Add psci.h to linux header sync-up script Pranavkumar Sawargaonkar
@ 2014-06-16 6:53 ` Pranavkumar Sawargaonkar
2014-06-16 6:53 ` [Qemu-devel] [PATCH V7 3/8] kvm: Handle exit reason KVM_EXIT_SYSTEM_EVENT Pranavkumar Sawargaonkar
` (6 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Pranavkumar Sawargaonkar @ 2014-06-16 6:53 UTC (permalink / raw)
To: qemu-devel
Cc: peter.maydell, Anup Patel, patches, robherring2, kvmarm,
christoffer.dall, Pranavkumar Sawargaonkar
Syncup KVM related linux headers from kvm tree and next branch
using scripts/update-linux-headers.sh.
Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org>
Signed-off-by: Anup Patel <anup.patel@linaro.org>
---
| 10 ++--
| 13 ++++--
| 35 ++++++++++++++
| 2 +-
| 6 +++
| 10 ++++
| 90 ++++++++++++++++++++++++++++++++++++
7 files changed, 156 insertions(+), 10 deletions(-)
create mode 100644 linux-headers/linux/psci.h
--git a/linux-headers/asm-arm/kvm.h b/linux-headers/asm-arm/kvm.h
index ef0c878..e6ebdd3 100644
--- a/linux-headers/asm-arm/kvm.h
+++ b/linux-headers/asm-arm/kvm.h
@@ -20,6 +20,7 @@
#define __ARM_KVM_H__
#include <linux/types.h>
+#include <linux/psci.h>
#include <asm/ptrace.h>
#define __KVM_HAVE_GUEST_DEBUG
@@ -83,6 +84,7 @@ struct kvm_regs {
#define KVM_VGIC_V2_CPU_SIZE 0x2000
#define KVM_ARM_VCPU_POWER_OFF 0 /* CPU is started in OFF state */
+#define KVM_ARM_VCPU_PSCI_0_2 1 /* CPU uses PSCI v0.2 */
struct kvm_vcpu_init {
__u32 target;
@@ -201,9 +203,9 @@ struct kvm_arch_memory_slot {
#define KVM_PSCI_FN_CPU_ON KVM_PSCI_FN(2)
#define KVM_PSCI_FN_MIGRATE KVM_PSCI_FN(3)
-#define KVM_PSCI_RET_SUCCESS 0
-#define KVM_PSCI_RET_NI ((unsigned long)-1)
-#define KVM_PSCI_RET_INVAL ((unsigned long)-2)
-#define KVM_PSCI_RET_DENIED ((unsigned long)-3)
+#define KVM_PSCI_RET_SUCCESS PSCI_RET_SUCCESS
+#define KVM_PSCI_RET_NI PSCI_RET_NOT_SUPPORTED
+#define KVM_PSCI_RET_INVAL PSCI_RET_INVALID_PARAMS
+#define KVM_PSCI_RET_DENIED PSCI_RET_DENIED
#endif /* __ARM_KVM_H__ */
--git a/linux-headers/asm-arm64/kvm.h b/linux-headers/asm-arm64/kvm.h
index eaf54a3..e633ff8 100644
--- a/linux-headers/asm-arm64/kvm.h
+++ b/linux-headers/asm-arm64/kvm.h
@@ -31,6 +31,7 @@
#define KVM_NR_SPSR 5
#ifndef __ASSEMBLY__
+#include <linux/psci.h>
#include <asm/types.h>
#include <asm/ptrace.h>
@@ -56,8 +57,9 @@ struct kvm_regs {
#define KVM_ARM_TARGET_FOUNDATION_V8 1
#define KVM_ARM_TARGET_CORTEX_A57 2
#define KVM_ARM_TARGET_XGENE_POTENZA 3
+#define KVM_ARM_TARGET_CORTEX_A53 4
-#define KVM_ARM_NUM_TARGETS 4
+#define KVM_ARM_NUM_TARGETS 5
/* KVM_ARM_SET_DEVICE_ADDR ioctl id encoding */
#define KVM_ARM_DEVICE_TYPE_SHIFT 0
@@ -77,6 +79,7 @@ struct kvm_regs {
#define KVM_ARM_VCPU_POWER_OFF 0 /* CPU is started in OFF state */
#define KVM_ARM_VCPU_EL1_32BIT 1 /* CPU running a 32bit VM */
+#define KVM_ARM_VCPU_PSCI_0_2 2 /* CPU uses PSCI v0.2 */
struct kvm_vcpu_init {
__u32 target;
@@ -186,10 +189,10 @@ struct kvm_arch_memory_slot {
#define KVM_PSCI_FN_CPU_ON KVM_PSCI_FN(2)
#define KVM_PSCI_FN_MIGRATE KVM_PSCI_FN(3)
-#define KVM_PSCI_RET_SUCCESS 0
-#define KVM_PSCI_RET_NI ((unsigned long)-1)
-#define KVM_PSCI_RET_INVAL ((unsigned long)-2)
-#define KVM_PSCI_RET_DENIED ((unsigned long)-3)
+#define KVM_PSCI_RET_SUCCESS PSCI_RET_SUCCESS
+#define KVM_PSCI_RET_NI PSCI_RET_NOT_SUPPORTED
+#define KVM_PSCI_RET_INVAL PSCI_RET_INVALID_PARAMS
+#define KVM_PSCI_RET_DENIED PSCI_RET_DENIED
#endif
--git a/linux-headers/asm-mips/kvm.h b/linux-headers/asm-mips/kvm.h
index f09ff5a..2c04b6d 100644
--- a/linux-headers/asm-mips/kvm.h
+++ b/linux-headers/asm-mips/kvm.h
@@ -106,6 +106,41 @@ struct kvm_fpu {
#define KVM_REG_MIPS_LO (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 33)
#define KVM_REG_MIPS_PC (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 34)
+/* KVM specific control registers */
+
+/*
+ * CP0_Count control
+ * DC: Set 0: Master disable CP0_Count and set COUNT_RESUME to now
+ * Set 1: Master re-enable CP0_Count with unchanged bias, handling timer
+ * interrupts since COUNT_RESUME
+ * This can be used to freeze the timer to get a consistent snapshot of
+ * the CP0_Count and timer interrupt pending state, while also resuming
+ * safely without losing time or guest timer interrupts.
+ * Other: Reserved, do not change.
+ */
+#define KVM_REG_MIPS_COUNT_CTL (KVM_REG_MIPS | KVM_REG_SIZE_U64 | \
+ 0x20000 | 0)
+#define KVM_REG_MIPS_COUNT_CTL_DC 0x00000001
+
+/*
+ * CP0_Count resume monotonic nanoseconds
+ * The monotonic nanosecond time of the last set of COUNT_CTL.DC (master
+ * disable). Any reads and writes of Count related registers while
+ * COUNT_CTL.DC=1 will appear to occur at this time. When COUNT_CTL.DC is
+ * cleared again (master enable) any timer interrupts since this time will be
+ * emulated.
+ * Modifications to times in the future are rejected.
+ */
+#define KVM_REG_MIPS_COUNT_RESUME (KVM_REG_MIPS | KVM_REG_SIZE_U64 | \
+ 0x20000 | 1)
+/*
+ * CP0_Count rate in Hz
+ * Specifies the rate of the CP0_Count timer in Hz. Modifications occur without
+ * discontinuities in CP0_Count.
+ */
+#define KVM_REG_MIPS_COUNT_HZ (KVM_REG_MIPS | KVM_REG_SIZE_U64 | \
+ 0x20000 | 2)
+
/*
* KVM MIPS specific structures and definitions
*
--git a/linux-headers/asm-powerpc/kvm.h b/linux-headers/asm-powerpc/kvm.h
index a6665be..2bc4a94 100644
--- a/linux-headers/asm-powerpc/kvm.h
+++ b/linux-headers/asm-powerpc/kvm.h
@@ -545,7 +545,6 @@ struct kvm_get_htab_header {
#define KVM_REG_PPC_TCSCR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb1)
#define KVM_REG_PPC_PID (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb2)
#define KVM_REG_PPC_ACOP (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb3)
-#define KVM_REG_PPC_WORT (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb4)
#define KVM_REG_PPC_VRSAVE (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xb4)
#define KVM_REG_PPC_LPCR (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xb5)
@@ -555,6 +554,7 @@ struct kvm_get_htab_header {
#define KVM_REG_PPC_ARCH_COMPAT (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xb7)
#define KVM_REG_PPC_DABRX (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xb8)
+#define KVM_REG_PPC_WORT (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb9)
/* Transactional Memory checkpointed state:
* This is all GPRs, all VSX regs and a subset of SPRs
--git a/linux-headers/asm-powerpc/kvm_para.h b/linux-headers/asm-powerpc/kvm_para.h
index 7e64f57..2abcc46 100644
--- a/linux-headers/asm-powerpc/kvm_para.h
+++ b/linux-headers/asm-powerpc/kvm_para.h
@@ -82,10 +82,16 @@ struct kvm_vcpu_arch_shared {
#define KVM_FEATURE_MAGIC_PAGE 1
+/* Magic page flags from host to guest */
+
#define KVM_MAGIC_FEAT_SR (1 << 0)
/* MASn, ESR, PIR, and high SPRGs */
#define KVM_MAGIC_FEAT_MAS0_TO_SPRG7 (1 << 1)
+/* Magic page flags from guest to host */
+
+#define MAGIC_PAGE_FLAG_NOT_MAPPED_NX (1 << 0)
+
#endif /* __POWERPC_KVM_PARA_H__ */
--git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
index 42ddc2c..f5d2c38 100644
--- a/linux-headers/linux/kvm.h
+++ b/linux-headers/linux/kvm.h
@@ -171,6 +171,7 @@ struct kvm_pit_config {
#define KVM_EXIT_WATCHDOG 21
#define KVM_EXIT_S390_TSCH 22
#define KVM_EXIT_EPR 23
+#define KVM_EXIT_SYSTEM_EVENT 24
/* For KVM_EXIT_INTERNAL_ERROR */
/* Emulate instruction failed. */
@@ -301,6 +302,13 @@ struct kvm_run {
struct {
__u32 epr;
} epr;
+ /* KVM_EXIT_SYSTEM_EVENT */
+ struct {
+#define KVM_SYSTEM_EVENT_SHUTDOWN 1
+#define KVM_SYSTEM_EVENT_RESET 2
+ __u32 type;
+ __u64 flags;
+ } system_event;
/* Fix the size of the union. */
char padding[256];
};
@@ -748,6 +756,8 @@ struct kvm_ppc_smmu_info {
#define KVM_CAP_S390_IRQCHIP 99
#define KVM_CAP_IOEVENTFD_NO_LENGTH 100
#define KVM_CAP_VM_ATTRIBUTES 101
+#define KVM_CAP_ARM_PSCI_0_2 102
+#define KVM_CAP_PPC_FIXUP_HCALL 103
#ifdef KVM_CAP_IRQ_ROUTING
--git a/linux-headers/linux/psci.h b/linux-headers/linux/psci.h
new file mode 100644
index 0000000..5a76763
--- /dev/null
+++ b/linux-headers/linux/psci.h
@@ -0,0 +1,90 @@
+/*
+ * ARM Power State and Coordination Interface (PSCI) header
+ *
+ * This header holds common PSCI defines and macros shared
+ * by: ARM kernel, ARM64 kernel, KVM ARM/ARM64 and user space.
+ *
+ * Copyright (C) 2014 Linaro Ltd.
+ * Author: Anup Patel <anup.patel@linaro.org>
+ */
+
+#ifndef _LINUX_PSCI_H
+#define _LINUX_PSCI_H
+
+/*
+ * PSCI v0.1 interface
+ *
+ * The PSCI v0.1 function numbers are implementation defined.
+ *
+ * Only PSCI return values such as: SUCCESS, NOT_SUPPORTED,
+ * INVALID_PARAMS, and DENIED defined below are applicable
+ * to PSCI v0.1.
+ */
+
+/* PSCI v0.2 interface */
+#define PSCI_0_2_FN_BASE 0x84000000
+#define PSCI_0_2_FN(n) (PSCI_0_2_FN_BASE + (n))
+#define PSCI_0_2_64BIT 0x40000000
+#define PSCI_0_2_FN64_BASE \
+ (PSCI_0_2_FN_BASE + PSCI_0_2_64BIT)
+#define PSCI_0_2_FN64(n) (PSCI_0_2_FN64_BASE + (n))
+
+#define PSCI_0_2_FN_PSCI_VERSION PSCI_0_2_FN(0)
+#define PSCI_0_2_FN_CPU_SUSPEND PSCI_0_2_FN(1)
+#define PSCI_0_2_FN_CPU_OFF PSCI_0_2_FN(2)
+#define PSCI_0_2_FN_CPU_ON PSCI_0_2_FN(3)
+#define PSCI_0_2_FN_AFFINITY_INFO PSCI_0_2_FN(4)
+#define PSCI_0_2_FN_MIGRATE PSCI_0_2_FN(5)
+#define PSCI_0_2_FN_MIGRATE_INFO_TYPE PSCI_0_2_FN(6)
+#define PSCI_0_2_FN_MIGRATE_INFO_UP_CPU PSCI_0_2_FN(7)
+#define PSCI_0_2_FN_SYSTEM_OFF PSCI_0_2_FN(8)
+#define PSCI_0_2_FN_SYSTEM_RESET PSCI_0_2_FN(9)
+
+#define PSCI_0_2_FN64_CPU_SUSPEND PSCI_0_2_FN64(1)
+#define PSCI_0_2_FN64_CPU_ON PSCI_0_2_FN64(3)
+#define PSCI_0_2_FN64_AFFINITY_INFO PSCI_0_2_FN64(4)
+#define PSCI_0_2_FN64_MIGRATE PSCI_0_2_FN64(5)
+#define PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU PSCI_0_2_FN64(7)
+
+/* PSCI v0.2 power state encoding for CPU_SUSPEND function */
+#define PSCI_0_2_POWER_STATE_ID_MASK 0xffff
+#define PSCI_0_2_POWER_STATE_ID_SHIFT 0
+#define PSCI_0_2_POWER_STATE_TYPE_SHIFT 16
+#define PSCI_0_2_POWER_STATE_TYPE_MASK \
+ (0x1 << PSCI_0_2_POWER_STATE_TYPE_SHIFT)
+#define PSCI_0_2_POWER_STATE_AFFL_SHIFT 24
+#define PSCI_0_2_POWER_STATE_AFFL_MASK \
+ (0x3 << PSCI_0_2_POWER_STATE_AFFL_SHIFT)
+
+/* PSCI v0.2 affinity level state returned by AFFINITY_INFO */
+#define PSCI_0_2_AFFINITY_LEVEL_ON 0
+#define PSCI_0_2_AFFINITY_LEVEL_OFF 1
+#define PSCI_0_2_AFFINITY_LEVEL_ON_PENDING 2
+
+/* PSCI v0.2 multicore support in Trusted OS returned by MIGRATE_INFO_TYPE */
+#define PSCI_0_2_TOS_UP_MIGRATE 0
+#define PSCI_0_2_TOS_UP_NO_MIGRATE 1
+#define PSCI_0_2_TOS_MP 2
+
+/* PSCI version decoding (independent of PSCI version) */
+#define PSCI_VERSION_MAJOR_SHIFT 16
+#define PSCI_VERSION_MINOR_MASK \
+ ((1U << PSCI_VERSION_MAJOR_SHIFT) - 1)
+#define PSCI_VERSION_MAJOR_MASK ~PSCI_VERSION_MINOR_MASK
+#define PSCI_VERSION_MAJOR(ver) \
+ (((ver) & PSCI_VERSION_MAJOR_MASK) >> PSCI_VERSION_MAJOR_SHIFT)
+#define PSCI_VERSION_MINOR(ver) \
+ ((ver) & PSCI_VERSION_MINOR_MASK)
+
+/* PSCI return values (inclusive of all PSCI versions) */
+#define PSCI_RET_SUCCESS 0
+#define PSCI_RET_NOT_SUPPORTED -1
+#define PSCI_RET_INVALID_PARAMS -2
+#define PSCI_RET_DENIED -3
+#define PSCI_RET_ALREADY_ON -4
+#define PSCI_RET_ON_PENDING -5
+#define PSCI_RET_INTERNAL_FAILURE -6
+#define PSCI_RET_NOT_PRESENT -7
+#define PSCI_RET_DISABLED -8
+
+#endif /* _LINUX_PSCI_H */
--
1.9.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [Qemu-devel] [PATCH V7 3/8] kvm: Handle exit reason KVM_EXIT_SYSTEM_EVENT
2014-06-16 6:53 [Qemu-devel] [PATCH V7 0/8] PSCI v0.2 support for KVM ARM/ARM64 Pranavkumar Sawargaonkar
2014-06-16 6:53 ` [Qemu-devel] [PATCH V7 1/8] update-linux-headers.sh: Add psci.h to linux header sync-up script Pranavkumar Sawargaonkar
2014-06-16 6:53 ` [Qemu-devel] [PATCH V7 2/8] linux-headers: Update KVM headers with kvm tree's next branch Pranavkumar Sawargaonkar
@ 2014-06-16 6:53 ` Pranavkumar Sawargaonkar
2014-06-16 6:53 ` [Qemu-devel] [PATCH V7 4/8] target-arm: Common kvm_arm_vcpu_init() for KVM ARM and KVM ARM64 Pranavkumar Sawargaonkar
` (5 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Pranavkumar Sawargaonkar @ 2014-06-16 6:53 UTC (permalink / raw)
To: qemu-devel
Cc: peter.maydell, Anup Patel, patches, robherring2, kvmarm,
christoffer.dall, Pranavkumar Sawargaonkar
In-kernel PSCI v0.2 emulation of KVM ARM/ARM64 forwards SYSTEM_OFF
and SYSTEM_RESET function calls to QEMU using KVM_EXIT_SYSTEM_EVENT
exit reason.
This patch updates kvm_cpu_exec() to handle KVM_SYSTEM_EVENT_SHUTDOWN
and KVM_SYSTEM_EVENT_RESET system-level events from QEMU-side.
Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org>
Signed-off-by: Anup Patel <anup.patel@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
---
kvm-all.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/kvm-all.c b/kvm-all.c
index 4e19eff..ef9f0f2 100644
--- a/kvm-all.c
+++ b/kvm-all.c
@@ -1751,6 +1751,22 @@ int kvm_cpu_exec(CPUState *cpu)
case KVM_EXIT_INTERNAL_ERROR:
ret = kvm_handle_internal_error(cpu, run);
break;
+ case KVM_EXIT_SYSTEM_EVENT:
+ switch (run->system_event.type) {
+ case KVM_SYSTEM_EVENT_SHUTDOWN:
+ qemu_system_shutdown_request();
+ ret = EXCP_INTERRUPT;
+ break;
+ case KVM_SYSTEM_EVENT_RESET:
+ qemu_system_reset_request();
+ ret = EXCP_INTERRUPT;
+ break;
+ default:
+ DPRINTF("kvm_arch_handle_exit\n");
+ ret = kvm_arch_handle_exit(cpu, run);
+ break;
+ }
+ break;
default:
DPRINTF("kvm_arch_handle_exit\n");
ret = kvm_arch_handle_exit(cpu, run);
--
1.9.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [Qemu-devel] [PATCH V7 4/8] target-arm: Common kvm_arm_vcpu_init() for KVM ARM and KVM ARM64
2014-06-16 6:53 [Qemu-devel] [PATCH V7 0/8] PSCI v0.2 support for KVM ARM/ARM64 Pranavkumar Sawargaonkar
` (2 preceding siblings ...)
2014-06-16 6:53 ` [Qemu-devel] [PATCH V7 3/8] kvm: Handle exit reason KVM_EXIT_SYSTEM_EVENT Pranavkumar Sawargaonkar
@ 2014-06-16 6:53 ` Pranavkumar Sawargaonkar
2014-06-16 6:53 ` [Qemu-devel] [PATCH V7 5/8] target-arm: Enable KVM_ARM_VCPU_PSCI_0_2 feature when possible Pranavkumar Sawargaonkar
` (4 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Pranavkumar Sawargaonkar @ 2014-06-16 6:53 UTC (permalink / raw)
To: qemu-devel
Cc: peter.maydell, Anup Patel, patches, robherring2, kvmarm,
christoffer.dall, Pranavkumar Sawargaonkar
Introduce a common kvm_arm_vcpu_init() for doing KVM_ARM_VCPU_INIT
ioctl in KVM ARM and KVM ARM64. This also helps us factor-out few
common code lines from kvm_arch_init_vcpu() for KVM ARM/ARM64.
Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org>
Signed-off-by: Anup Patel <anup.patel@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/cpu-qom.h | 3 +++
target-arm/kvm.c | 11 +++++++++++
target-arm/kvm32.c | 12 +++++++-----
target-arm/kvm64.c | 18 +++++++++++-------
target-arm/kvm_arm.h | 12 ++++++++++++
5 files changed, 44 insertions(+), 12 deletions(-)
diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h
index edc7f26..2bd7df8 100644
--- a/target-arm/cpu-qom.h
+++ b/target-arm/cpu-qom.h
@@ -102,6 +102,9 @@ typedef struct ARMCPU {
*/
uint32_t kvm_target;
+ /* KVM init features for this CPU */
+ uint32_t kvm_init_features[7];
+
/* The instance init functions for implementation-specific subclasses
* set these fields to specify the implementation-dependent values of
* various constant registers and reset values of non-constant
diff --git a/target-arm/kvm.c b/target-arm/kvm.c
index 39202d7..319784d 100644
--- a/target-arm/kvm.c
+++ b/target-arm/kvm.c
@@ -27,6 +27,17 @@ const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
KVM_CAP_LAST_INFO
};
+int kvm_arm_vcpu_init(CPUState *cs)
+{
+ ARMCPU *cpu = ARM_CPU(cs);
+ struct kvm_vcpu_init init;
+
+ init.target = cpu->kvm_target;
+ memcpy(init.features, cpu->kvm_init_features, sizeof(init.features));
+
+ return kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init);
+}
+
bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try,
int *fdarray,
struct kvm_vcpu_init *init)
diff --git a/target-arm/kvm32.c b/target-arm/kvm32.c
index b79750c..b142e90 100644
--- a/target-arm/kvm32.c
+++ b/target-arm/kvm32.c
@@ -166,7 +166,6 @@ static int compare_u64(const void *a, const void *b)
int kvm_arch_init_vcpu(CPUState *cs)
{
- struct kvm_vcpu_init init;
int i, ret, arraylen;
uint64_t v;
struct kvm_one_reg r;
@@ -179,15 +178,18 @@ int kvm_arch_init_vcpu(CPUState *cs)
return -EINVAL;
}
- init.target = cpu->kvm_target;
- memset(init.features, 0, sizeof(init.features));
+ /* Determine init features for this CPU */
+ memset(cpu->kvm_init_features, 0, sizeof(cpu->kvm_init_features));
if (cpu->start_powered_off) {
- init.features[0] = 1 << KVM_ARM_VCPU_POWER_OFF;
+ cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_POWER_OFF;
}
- ret = kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init);
+
+ /* Do KVM_ARM_VCPU_INIT ioctl */
+ ret = kvm_arm_vcpu_init(cs);
if (ret) {
return ret;
}
+
/* Query the kernel to make sure it supports 32 VFP
* registers: QEMU's "cortex-a15" CPU is always a
* VFP-D32 core. The simplest way to do this is just
diff --git a/target-arm/kvm64.c b/target-arm/kvm64.c
index 70f311b..9936aa8 100644
--- a/target-arm/kvm64.c
+++ b/target-arm/kvm64.c
@@ -77,9 +77,8 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUClass *ahcc)
int kvm_arch_init_vcpu(CPUState *cs)
{
- ARMCPU *cpu = ARM_CPU(cs);
- struct kvm_vcpu_init init;
int ret;
+ ARMCPU *cpu = ARM_CPU(cs);
if (cpu->kvm_target == QEMU_KVM_ARM_TARGET_NONE ||
!arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) {
@@ -87,16 +86,21 @@ int kvm_arch_init_vcpu(CPUState *cs)
return -EINVAL;
}
- init.target = cpu->kvm_target;
- memset(init.features, 0, sizeof(init.features));
+ /* Determine init features for this CPU */
+ memset(cpu->kvm_init_features, 0, sizeof(cpu->kvm_init_features));
if (cpu->start_powered_off) {
- init.features[0] = 1 << KVM_ARM_VCPU_POWER_OFF;
+ cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_POWER_OFF;
+ }
+
+ /* Do KVM_ARM_VCPU_INIT ioctl */
+ ret = kvm_arm_vcpu_init(cs);
+ if (ret) {
+ return ret;
}
- ret = kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init);
/* TODO : support for save/restore/reset of system regs via tuple list */
- return ret;
+ return 0;
}
#define AARCH64_CORE_REG(x) (KVM_REG_ARM64 | KVM_REG_SIZE_U64 | \
diff --git a/target-arm/kvm_arm.h b/target-arm/kvm_arm.h
index dc4e233..af93105 100644
--- a/target-arm/kvm_arm.h
+++ b/target-arm/kvm_arm.h
@@ -15,6 +15,18 @@
#include "exec/memory.h"
/**
+ * kvm_arm_vcpu_init:
+ * @cs: CPUState
+ *
+ * Initialize (or reinitialize) the VCPU by invoking the
+ * KVM_ARM_VCPU_INIT ioctl with the CPU type and feature
+ * bitmask specified in the CPUState.
+ *
+ * Returns: 0 if success else < 0 error code
+ */
+int kvm_arm_vcpu_init(CPUState *cs);
+
+/**
* kvm_arm_register_device:
* @mr: memory region for this device
* @devid: the KVM device ID
--
1.9.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [Qemu-devel] [PATCH V7 5/8] target-arm: Enable KVM_ARM_VCPU_PSCI_0_2 feature when possible
2014-06-16 6:53 [Qemu-devel] [PATCH V7 0/8] PSCI v0.2 support for KVM ARM/ARM64 Pranavkumar Sawargaonkar
` (3 preceding siblings ...)
2014-06-16 6:53 ` [Qemu-devel] [PATCH V7 4/8] target-arm: Common kvm_arm_vcpu_init() for KVM ARM and KVM ARM64 Pranavkumar Sawargaonkar
@ 2014-06-16 6:53 ` Pranavkumar Sawargaonkar
2014-06-16 6:53 ` [Qemu-devel] [PATCH V7 6/8] target-arm: Implement kvm_arch_reset_vcpu() for KVM ARM64 Pranavkumar Sawargaonkar
` (3 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Pranavkumar Sawargaonkar @ 2014-06-16 6:53 UTC (permalink / raw)
To: qemu-devel
Cc: peter.maydell, Anup Patel, patches, robherring2, kvmarm,
christoffer.dall, Pranavkumar Sawargaonkar
Latest linux kernel supports in-kernel emulation of PSCI v0.2 but
to enable it we need to select KVM_ARM_VCPU_PSCI_0_2 feature using
KVM_ARM_VCPU_INIT ioctl.
Also, we can use KVM_ARM_VCPU_PSCI_0_2 feature for VCPU only when
linux kernel has KVM_CAP_ARM_PSCI_0_2 capability.
This patch updates kvm_arch_init_vcpu() to enable KVM_ARM_VCPU_PSCI_0_2
feature for VCPU when KVM ARM/ARM64 has KVM_CAP_ARM_PSCI_0_2 capability.
Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org>
Signed-off-by: Anup Patel <anup.patel@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/kvm32.c | 3 +++
target-arm/kvm64.c | 3 +++
2 files changed, 6 insertions(+)
diff --git a/target-arm/kvm32.c b/target-arm/kvm32.c
index b142e90..52d626c 100644
--- a/target-arm/kvm32.c
+++ b/target-arm/kvm32.c
@@ -183,6 +183,9 @@ int kvm_arch_init_vcpu(CPUState *cs)
if (cpu->start_powered_off) {
cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_POWER_OFF;
}
+ if (kvm_check_extension(cs->kvm_state, KVM_CAP_ARM_PSCI_0_2)) {
+ cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_PSCI_0_2;
+ }
/* Do KVM_ARM_VCPU_INIT ioctl */
ret = kvm_arm_vcpu_init(cs);
diff --git a/target-arm/kvm64.c b/target-arm/kvm64.c
index 9936aa8..828ffb6 100644
--- a/target-arm/kvm64.c
+++ b/target-arm/kvm64.c
@@ -91,6 +91,9 @@ int kvm_arch_init_vcpu(CPUState *cs)
if (cpu->start_powered_off) {
cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_POWER_OFF;
}
+ if (kvm_check_extension(cs->kvm_state, KVM_CAP_ARM_PSCI_0_2)) {
+ cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_PSCI_0_2;
+ }
/* Do KVM_ARM_VCPU_INIT ioctl */
ret = kvm_arm_vcpu_init(cs);
--
1.9.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [Qemu-devel] [PATCH V7 6/8] target-arm: Implement kvm_arch_reset_vcpu() for KVM ARM64
2014-06-16 6:53 [Qemu-devel] [PATCH V7 0/8] PSCI v0.2 support for KVM ARM/ARM64 Pranavkumar Sawargaonkar
` (4 preceding siblings ...)
2014-06-16 6:53 ` [Qemu-devel] [PATCH V7 5/8] target-arm: Enable KVM_ARM_VCPU_PSCI_0_2 feature when possible Pranavkumar Sawargaonkar
@ 2014-06-16 6:53 ` Pranavkumar Sawargaonkar
2014-06-16 6:53 ` [Qemu-devel] [PATCH V7 7/8] target-arm: Introduce per-CPU field for PSCI version Pranavkumar Sawargaonkar
` (2 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Pranavkumar Sawargaonkar @ 2014-06-16 6:53 UTC (permalink / raw)
To: qemu-devel
Cc: peter.maydell, Anup Patel, patches, robherring2, kvmarm,
christoffer.dall, Pranavkumar Sawargaonkar
To implement kvm_arch_reset_vcpu(), we simply re-init the VCPU
using kvm_arm_vcpu_init() so that all registers of VCPU are set
to their reset values by in-kernel KVM code.
Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org>
Signed-off-by: Anup Patel <anup.patel@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/kvm64.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/target-arm/kvm64.c b/target-arm/kvm64.c
index 828ffb6..fca5f58 100644
--- a/target-arm/kvm64.c
+++ b/target-arm/kvm64.c
@@ -269,4 +269,8 @@ int kvm_arch_get_registers(CPUState *cs)
void kvm_arm_reset_vcpu(ARMCPU *cpu)
{
+ /* Re-init VCPU so that all registers are set to
+ * their respective reset values.
+ */
+ kvm_arm_vcpu_init(CPU(cpu));
}
--
1.9.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [Qemu-devel] [PATCH V7 7/8] target-arm: Introduce per-CPU field for PSCI version
2014-06-16 6:53 [Qemu-devel] [PATCH V7 0/8] PSCI v0.2 support for KVM ARM/ARM64 Pranavkumar Sawargaonkar
` (5 preceding siblings ...)
2014-06-16 6:53 ` [Qemu-devel] [PATCH V7 6/8] target-arm: Implement kvm_arch_reset_vcpu() for KVM ARM64 Pranavkumar Sawargaonkar
@ 2014-06-16 6:53 ` Pranavkumar Sawargaonkar
2014-06-16 6:53 ` [Qemu-devel] [PATCH V7 8/8] Use PSCI v0.2 compatible string when KVM or TCG provides it Pranavkumar Sawargaonkar
2014-06-16 11:01 ` [Qemu-devel] [PATCH V7 0/8] PSCI v0.2 support for KVM ARM/ARM64 Peter Maydell
8 siblings, 0 replies; 11+ messages in thread
From: Pranavkumar Sawargaonkar @ 2014-06-16 6:53 UTC (permalink / raw)
To: qemu-devel
Cc: peter.maydell, Anup Patel, patches, robherring2, kvmarm,
christoffer.dall, Pranavkumar Sawargaonkar
We require to know the PSCI version available to given CPU at
potentially many places. Currently, we need to know PSCI version
when generating DTB for virt machine.
This patch introduce per-CPU 32bit field representing the PSCI
version available to the CPU. The encoding of this 32bit field
is same as described in PSCI v0.2 spec.
Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org>
Signed-off-by: Anup Patel <anup.patel@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/cpu-qom.h | 6 ++++++
target-arm/cpu.c | 1 +
target-arm/kvm32.c | 1 +
target-arm/kvm64.c | 1 +
4 files changed, 9 insertions(+)
diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h
index 2bd7df8..eaee944 100644
--- a/target-arm/cpu-qom.h
+++ b/target-arm/cpu-qom.h
@@ -94,6 +94,12 @@ typedef struct ARMCPU {
/* 'compatible' string for this CPU for Linux device trees */
const char *dtb_compatible;
+ /* PSCI version for this CPU
+ * Bits[31:16] = Major Version
+ * Bits[15:0] = Minor Version
+ */
+ uint32_t psci_version;
+
/* Should CPU start in PSCI powered-off state? */
bool start_powered_off;
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index b877835..05e52e0 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -260,6 +260,7 @@ static void arm_cpu_initfn(Object *obj)
* picky DTB consumer will also provide a helpful error message.
*/
cpu->dtb_compatible = "qemu,unknown";
+ cpu->psci_version = 1; /* By default assume PSCI v0.1 */
cpu->kvm_target = QEMU_KVM_ARM_TARGET_NONE;
if (tcg_enabled() && !inited) {
diff --git a/target-arm/kvm32.c b/target-arm/kvm32.c
index 52d626c..068af7d 100644
--- a/target-arm/kvm32.c
+++ b/target-arm/kvm32.c
@@ -184,6 +184,7 @@ int kvm_arch_init_vcpu(CPUState *cs)
cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_POWER_OFF;
}
if (kvm_check_extension(cs->kvm_state, KVM_CAP_ARM_PSCI_0_2)) {
+ cpu->psci_version = 2;
cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_PSCI_0_2;
}
diff --git a/target-arm/kvm64.c b/target-arm/kvm64.c
index fca5f58..5d217ca 100644
--- a/target-arm/kvm64.c
+++ b/target-arm/kvm64.c
@@ -92,6 +92,7 @@ int kvm_arch_init_vcpu(CPUState *cs)
cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_POWER_OFF;
}
if (kvm_check_extension(cs->kvm_state, KVM_CAP_ARM_PSCI_0_2)) {
+ cpu->psci_version = 2;
cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_PSCI_0_2;
}
--
1.9.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [Qemu-devel] [PATCH V7 8/8] Use PSCI v0.2 compatible string when KVM or TCG provides it
2014-06-16 6:53 [Qemu-devel] [PATCH V7 0/8] PSCI v0.2 support for KVM ARM/ARM64 Pranavkumar Sawargaonkar
` (6 preceding siblings ...)
2014-06-16 6:53 ` [Qemu-devel] [PATCH V7 7/8] target-arm: Introduce per-CPU field for PSCI version Pranavkumar Sawargaonkar
@ 2014-06-16 6:53 ` Pranavkumar Sawargaonkar
2014-06-16 11:01 ` [Qemu-devel] [PATCH V7 0/8] PSCI v0.2 support for KVM ARM/ARM64 Peter Maydell
8 siblings, 0 replies; 11+ messages in thread
From: Pranavkumar Sawargaonkar @ 2014-06-16 6:53 UTC (permalink / raw)
To: qemu-devel
Cc: peter.maydell, Anup Patel, patches, robherring2, kvmarm,
christoffer.dall, Pranavkumar Sawargaonkar
If we have PSCI v0.2 emulation available for KVM ARM/ARM64 or TCG then
we need to provide PSCI v0.2 compatible string via generated DTB.
Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org>
Signed-off-by: Anup Patel <anup.patel@linaro.org>
Reviewed-by: Rob Herring <rob.herring@linaro.org>
---
hw/arm/virt.c | 16 +++++++++++++++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 3b55a4b..72fe030 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -180,10 +180,23 @@ static void create_fdt(VirtBoardInfo *vbi)
"clk24mhz");
qemu_fdt_setprop_cell(fdt, "/apb-pclk", "phandle", vbi->clock_phandle);
+}
+
+static void fdt_add_psci_node(const VirtBoardInfo *vbi)
+{
+ void *fdt = vbi->fdt;
+ ARMCPU *armcpu = ARM_CPU(qemu_get_cpu(0));
+
/* No PSCI for TCG yet */
if (kvm_enabled()) {
qemu_fdt_add_subnode(fdt, "/psci");
- qemu_fdt_setprop_string(fdt, "/psci", "compatible", "arm,psci");
+ if (armcpu->psci_version == 2) {
+ const char comp[] = "arm,psci-0.2\0arm,psci";
+ qemu_fdt_setprop(fdt, "/psci", "compatible", comp, sizeof(comp));
+ } else {
+ qemu_fdt_setprop_string(fdt, "/psci", "compatible", "arm,psci");
+ }
+
qemu_fdt_setprop_string(fdt, "/psci", "method", "hvc");
qemu_fdt_setprop_cell(fdt, "/psci", "cpu_suspend",
PSCI_FN_CPU_SUSPEND);
@@ -446,6 +459,7 @@ static void machvirt_init(MachineState *machine)
object_property_set_bool(cpuobj, true, "realized", NULL);
}
fdt_add_cpu_nodes(vbi);
+ fdt_add_psci_node(vbi);
memory_region_init_ram(ram, NULL, "mach-virt.ram", machine->ram_size);
vmstate_register_ram_global(ram);
--
1.9.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [Qemu-devel] [PATCH V7 0/8] PSCI v0.2 support for KVM ARM/ARM64
2014-06-16 6:53 [Qemu-devel] [PATCH V7 0/8] PSCI v0.2 support for KVM ARM/ARM64 Pranavkumar Sawargaonkar
` (7 preceding siblings ...)
2014-06-16 6:53 ` [Qemu-devel] [PATCH V7 8/8] Use PSCI v0.2 compatible string when KVM or TCG provides it Pranavkumar Sawargaonkar
@ 2014-06-16 11:01 ` Peter Maydell
2014-06-16 11:46 ` Pranavkumar Sawargaonkar
8 siblings, 1 reply; 11+ messages in thread
From: Peter Maydell @ 2014-06-16 11:01 UTC (permalink / raw)
To: Pranavkumar Sawargaonkar
Cc: patches@apm.com, Rob Herring, QEMU Developers, Christoffer Dall,
kvmarm@lists.cs.columbia.edu
On 16 June 2014 07:53, Pranavkumar Sawargaonkar <pranavkumar@linaro.org> wrote:
> This patchset adds the QEMU side changes for providing PSCI v0.2 to VM.
>
> ChangeLog:
>
> V7:
> - Sync linux headers against kvm tree and "next" branch
Which commit hash were the headers sync'd against?
This info ought to be in the commit message of
the commit updating the headers; I can fix that up
by hand if you let me know what it is...
thanks
-- PMM
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [Qemu-devel] [PATCH V7 0/8] PSCI v0.2 support for KVM ARM/ARM64
2014-06-16 11:01 ` [Qemu-devel] [PATCH V7 0/8] PSCI v0.2 support for KVM ARM/ARM64 Peter Maydell
@ 2014-06-16 11:46 ` Pranavkumar Sawargaonkar
0 siblings, 0 replies; 11+ messages in thread
From: Pranavkumar Sawargaonkar @ 2014-06-16 11:46 UTC (permalink / raw)
To: Peter Maydell
Cc: patches@apm.com, Rob Herring, QEMU Developers, Christoffer Dall,
kvmarm@lists.cs.columbia.edu
[-- Attachment #1: Type: text/plain, Size: 635 bytes --]
Hi Peter,
On 16 June 2014 16:31, Peter Maydell <peter.maydell@linaro.org> wrote:
> On 16 June 2014 07:53, Pranavkumar Sawargaonkar <pranavkumar@linaro.org>
> wrote:
> > This patchset adds the QEMU side changes for providing PSCI v0.2 to VM.
> >
> > ChangeLog:
> >
> > V7:
> > - Sync linux headers against kvm tree and "next" branch
>
> Which commit hash were the headers sync'd against?
>
Commit hash is :
820b3fcdeb80d30410f4427d2cbf9161c35fdeef
> This info ought to be in the commit message of
> the commit updating the headers; I can fix that up
> by hand if you let me know what it is...
>
> thanks
> -- PMM
>
Thanks,
Pranav
[-- Attachment #2: Type: text/html, Size: 1313 bytes --]
^ permalink raw reply [flat|nested] 11+ messages in thread