[Qemu-devel] Endian control register

[Benjamin Herrenschmidt <benh@kernel.crashing.org>]

Hi !

So while trying to solve an issue we have with qemu/kvm and powerpc who
can be both LE and BE nowadays, we thought the ideal solution would be
to have a register in the emulated VGA to control the endian.

Since qemu wishes to remain as much as possible in sync / compatible
with Bochs, I'm posting to this list so that the definition can be
made common even if Bochs doesn't have to actually implement it.

Now the basic idea is to have a bit indicating that endian control is
supported and a bit to control the guest endianness, set by the guest
appropriately (which affects all the pixel formats).

My original idea was to add a VBE register. However BOCHS seems to
be unhappy (after a quick glance at the source) if the guest tries to
read a non-existing register, so I suppose either the "support endian
switch" information needs to be encoded in an existing register in a way
that doesn't break existing code ... or the presence of the new register
advertised in such a way, for example via the PCI revision ID.

Note that I am not trying to support something like endian apertures and
that whole trainwreck that we had back in the day on BE machines. Simply
carry the guest endianness assuming that this affects all the pixel
formats which continue to be the classic ARGB ones, simply encoded with
the right endian (so 8bpp is unaffected for example).

Any suggestion ? Comment ? Flame ? :-)

Cheers,
Ben.