From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43866) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WwZOE-00042Q-I0 for qemu-devel@nongnu.org; Mon, 16 Jun 2014 12:04:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WwZO5-0003dZ-BE for qemu-devel@nongnu.org; Mon, 16 Jun 2014 12:04:10 -0400 From: Tom Musta Date: Mon, 16 Jun 2014 11:03:22 -0500 Message-Id: <1402934602-29002-5-git-send-email-tommusta@gmail.com> In-Reply-To: <1402934602-29002-1-git-send-email-tommusta@gmail.com> References: <1402934602-29002-1-git-send-email-tommusta@gmail.com> Subject: [Qemu-devel] [PATCH 4/4] linux-user: Support HWCAP2 in PowerPC List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: tommusta@gmail.com, qemu-ppc@nongnu.org Set bits in the AT_HWCAP2 entry of the AUXV. Specifically, detect and set bits for bctar, ISEL and ISA 2.07. Signed-off-by: Tom Musta --- linux-user/elfload.c | 31 +++++++++++++++++++++++++++++++ 1 files changed, 31 insertions(+), 0 deletions(-) diff --git a/linux-user/elfload.c b/linux-user/elfload.c index ab46695..d661127 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -729,6 +729,14 @@ enum { QEMU_PPC_FEATURE_TRUE_LE = 0x00000002, QEMU_PPC_FEATURE_PPC_LE = 0x00000001, + + /* Feature definitions in AT_HWCAP2. */ + QEMU_PPC_FEATURE2_ARCH_2_07 = 0x80000000, /* ISA 2.07 */ + QEMU_PPC_FEATURE2_HAS_HTM = 0x40000000, /* Hardware Transactional Memory */ + QEMU_PPC_FEATURE2_HAS_DSCR = 0x20000000, /* Data Stream Control Register */ + QEMU_PPC_FEATURE2_HAS_EBB = 0x10000000, /* Event Base Branching */ + QEMU_PPC_FEATURE2_HAS_ISEL = 0x08000000, /* Integer Select */ + QEMU_PPC_FEATURE2_HAS_TAR = 0x04000000, /* Target Address Register */ }; #define ELF_HWCAP get_elf_hwcap() @@ -763,6 +771,29 @@ static uint32_t get_elf_hwcap(void) return features; } +#define ELF_HWCAP2 get_elf_hwcap2() + +static uint32_t get_elf_hwcap2(void) +{ + PowerPCCPU *cpu = POWERPC_CPU(thread_cpu); + uint32_t features = 0; + +#define GET_FEATURE(flag, feature) \ + do { if (cpu->env.insns_flags & flag) { features |= feature; } } while (0) +#define GET_FEATURE2(flag, feature) \ + do { if (cpu->env.insns_flags2 & flag) { features |= feature; } } while (0) + + GET_FEATURE(PPC_ISEL, QEMU_PPC_FEATURE2_HAS_ISEL); + GET_FEATURE2(PPC2_BCTAR_ISA207, QEMU_PPC_FEATURE2_HAS_TAR); + GET_FEATURE2((PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 | + PPC2_ISA207S), QEMU_PPC_FEATURE2_ARCH_2_07); + +#undef GET_FEATURE +#undef GET_FEATURE2 + + return features; +} + /* * The requirements here are: * - keep the final alignment of sp (sp & 0xf) -- 1.7.1