From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35844) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wwp4G-0004fN-MU for qemu-devel@nongnu.org; Tue, 17 Jun 2014 04:48:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Wwp4B-0003el-UW for qemu-devel@nongnu.org; Tue, 17 Jun 2014 04:48:36 -0400 Received: from mail-pd0-x231.google.com ([2607:f8b0:400e:c02::231]:52425) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wwp4B-0003ea-Oy for qemu-devel@nongnu.org; Tue, 17 Jun 2014 04:48:31 -0400 Received: by mail-pd0-f177.google.com with SMTP id y10so3893600pdj.36 for ; Tue, 17 Jun 2014 01:48:30 -0700 (PDT) From: "Edgar E. Iglesias" Date: Tue, 17 Jun 2014 18:45:33 +1000 Message-Id: <1402994746-8328-4-git-send-email-edgar.iglesias@gmail.com> In-Reply-To: <1402994746-8328-1-git-send-email-edgar.iglesias@gmail.com> References: <1402994746-8328-1-git-send-email-edgar.iglesias@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PATCH v3 03/16] target-arm: A64: Respect SPSEL when taking exceptions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, peter.maydell@linaro.org Cc: rob.herring@linaro.org, peter.crosthwaite@xilinx.com, aggelerf@ethz.ch, agraf@suse.de, blauwirbel@gmail.com, john.williams@xilinx.com, greg.bellows@linaro.org, pbonzini@redhat.com, alex.bennee@linaro.org, christoffer.dall@linaro.org, rth@twiddle.net From: "Edgar E. Iglesias" Reviewed-by: Alex Bennée Signed-off-by: Edgar E. Iglesias --- target-arm/helper-a64.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c index 2b4ce6a..027434a 100644 --- a/target-arm/helper-a64.c +++ b/target-arm/helper-a64.c @@ -489,8 +489,7 @@ void aarch64_cpu_do_interrupt(CPUState *cs) if (is_a64(env)) { env->banked_spsr[aarch64_banked_spsr_index(1)] = pstate_read(env); - env->sp_el[arm_current_pl(env)] = env->xregs[31]; - env->xregs[31] = env->sp_el[1]; + aarch64_save_sp(env, arm_current_pl(env)); env->elr_el[1] = env->pc; } else { env->banked_spsr[0] = cpsr_read(env); @@ -508,6 +507,7 @@ void aarch64_cpu_do_interrupt(CPUState *cs) pstate_write(env, PSTATE_DAIF | PSTATE_MODE_EL1h); env->aarch64 = 1; + aarch64_restore_sp(env, 1); env->pc = addr; cs->interrupt_request |= CPU_INTERRUPT_EXITTB; -- 1.8.3.2