From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47711) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WxgGp-0000pN-LX for qemu-devel@nongnu.org; Thu, 19 Jun 2014 13:37:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WxgGo-0004sx-7F for qemu-devel@nongnu.org; Thu, 19 Jun 2014 13:37:07 -0400 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:48646) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WxgGn-0004k9-W4 for qemu-devel@nongnu.org; Thu, 19 Jun 2014 13:37:06 -0400 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1WxgGg-0002Jt-6k for qemu-devel@nongnu.org; Thu, 19 Jun 2014 18:36:58 +0100 From: Peter Maydell Date: Thu, 19 Jun 2014 18:36:55 +0100 Message-Id: <1403199417-8833-13-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1403199417-8833-1-git-send-email-peter.maydell@linaro.org> References: <1403199417-8833-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PULL 12/14] target-arm: Introduce per-CPU field for PSCI version List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org From: Pranavkumar Sawargaonkar We require to know the PSCI version available to given CPU at potentially many places. Currently, we need to know PSCI version when generating DTB for virt machine. This patch introduce per-CPU 32bit field representing the PSCI version available to the CPU. The encoding of this 32bit field is same as described in PSCI v0.2 spec. Signed-off-by: Pranavkumar Sawargaonkar Signed-off-by: Anup Patel Reviewed-by: Peter Maydell Message-id: 1402901605-24551-8-git-send-email-pranavkumar@linaro.org Signed-off-by: Peter Maydell --- target-arm/cpu-qom.h | 6 ++++++ target-arm/cpu.c | 1 + target-arm/kvm32.c | 1 + target-arm/kvm64.c | 1 + 4 files changed, 9 insertions(+) diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h index 2bd7df8..eaee944 100644 --- a/target-arm/cpu-qom.h +++ b/target-arm/cpu-qom.h @@ -94,6 +94,12 @@ typedef struct ARMCPU { /* 'compatible' string for this CPU for Linux device trees */ const char *dtb_compatible; + /* PSCI version for this CPU + * Bits[31:16] = Major Version + * Bits[15:0] = Minor Version + */ + uint32_t psci_version; + /* Should CPU start in PSCI powered-off state? */ bool start_powered_off; diff --git a/target-arm/cpu.c b/target-arm/cpu.c index b877835..05e52e0 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -260,6 +260,7 @@ static void arm_cpu_initfn(Object *obj) * picky DTB consumer will also provide a helpful error message. */ cpu->dtb_compatible = "qemu,unknown"; + cpu->psci_version = 1; /* By default assume PSCI v0.1 */ cpu->kvm_target = QEMU_KVM_ARM_TARGET_NONE; if (tcg_enabled() && !inited) { diff --git a/target-arm/kvm32.c b/target-arm/kvm32.c index 52d626c..068af7d 100644 --- a/target-arm/kvm32.c +++ b/target-arm/kvm32.c @@ -184,6 +184,7 @@ int kvm_arch_init_vcpu(CPUState *cs) cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_POWER_OFF; } if (kvm_check_extension(cs->kvm_state, KVM_CAP_ARM_PSCI_0_2)) { + cpu->psci_version = 2; cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_PSCI_0_2; } diff --git a/target-arm/kvm64.c b/target-arm/kvm64.c index fca5f58..5d217ca 100644 --- a/target-arm/kvm64.c +++ b/target-arm/kvm64.c @@ -92,6 +92,7 @@ int kvm_arch_init_vcpu(CPUState *cs) cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_POWER_OFF; } if (kvm_check_extension(cs->kvm_state, KVM_CAP_ARM_PSCI_0_2)) { + cpu->psci_version = 2; cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_PSCI_0_2; } -- 1.9.2