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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 14/14] armv7m_nvic: fix AIRCR implementation
Date: Thu, 19 Jun 2014 18:36:57 +0100	[thread overview]
Message-ID: <1403199417-8833-15-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1403199417-8833-1-git-send-email-peter.maydell@linaro.org>

From: Oran Avraham <oranav@gmail.com>

The returned reset value was wrong (off by one zero nibble), and
qemu didn't log unimplemented writes to the PRIGROUP field.

Signed-off-by: Oran Avraham <oranav@gmail.com>
Message-id: 1403010447-4627-1-git-send-email-oranav@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/intc/armv7m_nvic.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
index 75d9c6e..1a7af45 100644
--- a/hw/intc/armv7m_nvic.c
+++ b/hw/intc/armv7m_nvic.c
@@ -211,7 +211,7 @@ static uint32_t nvic_readl(nvic_state *s, uint32_t offset)
         cpu = ARM_CPU(current_cpu);
         return cpu->env.v7m.vecbase;
     case 0xd0c: /* Application Interrupt/Reset Control.  */
-        return 0xfa05000;
+        return 0xfa050000;
     case 0xd10: /* System Control.  */
         /* TODO: Implement SLEEPONEXIT.  */
         return 0;
@@ -346,6 +346,9 @@ static void nvic_writel(nvic_state *s, uint32_t offset, uint32_t value)
             if (value & 5) {
                 qemu_log_mask(LOG_UNIMP, "AIRCR system reset unimplemented\n");
             }
+            if (value & 0x700) {
+                qemu_log_mask(LOG_UNIMP, "PRIGROUP unimplemented\n");
+            }
         }
         break;
     case 0xd10: /* System Control.  */
-- 
1.9.2

  parent reply	other threads:[~2014-06-19 17:37 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-06-19 17:36 [Qemu-devel] [PULL 00/14] target-arm queue Peter Maydell
2014-06-19 17:36 ` [Qemu-devel] [PULL 01/14] target-arm: implement PD0/PD1 bits for TTBCR Peter Maydell
2014-06-19 17:36 ` [Qemu-devel] [PULL 02/14] hw/arm/spitz: Avoid clash with Windows header symbol MOD_SHIFT Peter Maydell
2014-06-19 17:36 ` [Qemu-devel] [PULL 03/14] target-arm: Add ULL suffix to calculation of page size Peter Maydell
2014-06-19 17:36 ` [Qemu-devel] [PULL 04/14] target-arm/translate-a64.c: Remove dead ?: in disas_simd_3same_int() Peter Maydell
2014-06-19 17:36 ` [Qemu-devel] [PULL 05/14] target-arm/translate-a64.c: Fix dead ?: in handle_simd_shift_fpint_conv() Peter Maydell
2014-06-19 17:36 ` [Qemu-devel] [PULL 06/14] hw/arm/vexpress: Forbid specifying flash contents in two ways at once Peter Maydell
2014-06-19 17:36 ` [Qemu-devel] [PULL 07/14] hw/block/pflash_cfi01: Report correct size info for parallel configs Peter Maydell
2014-06-19 17:36 ` [Qemu-devel] [PULL 08/14] kvm: Handle exit reason KVM_EXIT_SYSTEM_EVENT Peter Maydell
2014-06-19 17:36 ` [Qemu-devel] [PULL 09/14] target-arm: Common kvm_arm_vcpu_init() for KVM ARM and KVM ARM64 Peter Maydell
2014-06-19 17:36 ` [Qemu-devel] [PULL 10/14] target-arm: Enable KVM_ARM_VCPU_PSCI_0_2 feature when possible Peter Maydell
2014-06-19 17:36 ` [Qemu-devel] [PULL 11/14] target-arm: Implement kvm_arch_reset_vcpu() for KVM ARM64 Peter Maydell
2014-06-19 17:36 ` [Qemu-devel] [PULL 12/14] target-arm: Introduce per-CPU field for PSCI version Peter Maydell
2014-06-19 17:36 ` [Qemu-devel] [PULL 13/14] Use PSCI v0.2 compatible string when KVM or TCG provides it Peter Maydell
2014-06-19 17:36 ` Peter Maydell [this message]
2014-06-20 17:00 ` [Qemu-devel] [PULL 00/14] target-arm queue Peter Maydell

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