From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 07/14] hw/block/pflash_cfi01: Report correct size info for parallel configs
Date: Thu, 19 Jun 2014 18:36:50 +0100 [thread overview]
Message-ID: <1403199417-8833-8-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1403199417-8833-1-git-send-email-peter.maydell@linaro.org>
If the flash device is configured with a device-width which is
not equal to the bank-width, indicating that it is actually several
narrow flash devices in parallel, the CFI table should report the
number of blocks and the size of a single device, not of the whole
combined setup. This stops Linux from complaining:
"NOR chip too large to fit in mapping. Attempting to cope..."
As usual, we retain the old broken but backwards compatible behaviour
when the device-width is not specified.
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1402409025-25694-1-git-send-email-peter.maydell@linaro.org
---
hw/block/pflash_cfi01.c | 20 +++++++++++++++++---
1 file changed, 17 insertions(+), 3 deletions(-)
diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
index 0c95d53..f9507b4 100644
--- a/hw/block/pflash_cfi01.c
+++ b/hw/block/pflash_cfi01.c
@@ -748,9 +748,18 @@ static void pflash_cfi01_realize(DeviceState *dev, Error **errp)
pflash_t *pfl = CFI_PFLASH01(dev);
uint64_t total_len;
int ret;
+ uint64_t blocks_per_device, device_len;
+ int num_devices;
total_len = pfl->sector_len * pfl->nb_blocs;
+ /* These are only used to expose the parameters of each device
+ * in the cfi_table[].
+ */
+ num_devices = pfl->device_width ? (pfl->bank_width / pfl->device_width) : 1;
+ blocks_per_device = pfl->nb_blocs / num_devices;
+ device_len = pfl->sector_len * blocks_per_device;
+
/* XXX: to be fixed */
#if 0
if (total_len != (8 * 1024 * 1024) && total_len != (16 * 1024 * 1024) &&
@@ -838,7 +847,7 @@ static void pflash_cfi01_realize(DeviceState *dev, Error **errp)
/* Max timeout for chip erase */
pfl->cfi_table[0x26] = 0x00;
/* Device size */
- pfl->cfi_table[0x27] = ctz32(total_len); // + 1;
+ pfl->cfi_table[0x27] = ctz32(device_len); /* + 1; */
/* Flash device interface (8 & 16 bits) */
pfl->cfi_table[0x28] = 0x02;
pfl->cfi_table[0x29] = 0x00;
@@ -854,8 +863,8 @@ static void pflash_cfi01_realize(DeviceState *dev, Error **errp)
/* Number of erase block regions (uniform) */
pfl->cfi_table[0x2C] = 0x01;
/* Erase block region 1 */
- pfl->cfi_table[0x2D] = pfl->nb_blocs - 1;
- pfl->cfi_table[0x2E] = (pfl->nb_blocs - 1) >> 8;
+ pfl->cfi_table[0x2D] = blocks_per_device - 1;
+ pfl->cfi_table[0x2E] = (blocks_per_device - 1) >> 8;
pfl->cfi_table[0x2F] = pfl->sector_len >> 8;
pfl->cfi_table[0x30] = pfl->sector_len >> 16;
@@ -882,6 +891,11 @@ static void pflash_cfi01_realize(DeviceState *dev, Error **errp)
static Property pflash_cfi01_properties[] = {
DEFINE_PROP_DRIVE("drive", struct pflash_t, bs),
+ /* num-blocks is the number of blocks actually visible to the guest,
+ * ie the total size of the device divided by the sector length.
+ * If we're emulating flash devices wired in parallel the actual
+ * number of blocks per indvidual device will differ.
+ */
DEFINE_PROP_UINT32("num-blocks", struct pflash_t, nb_blocs, 0),
DEFINE_PROP_UINT64("sector-length", struct pflash_t, sector_len, 0),
/* width here is the overall width of this QEMU device in bytes.
--
1.9.2
next prev parent reply other threads:[~2014-06-19 17:37 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-19 17:36 [Qemu-devel] [PULL 00/14] target-arm queue Peter Maydell
2014-06-19 17:36 ` [Qemu-devel] [PULL 01/14] target-arm: implement PD0/PD1 bits for TTBCR Peter Maydell
2014-06-19 17:36 ` [Qemu-devel] [PULL 02/14] hw/arm/spitz: Avoid clash with Windows header symbol MOD_SHIFT Peter Maydell
2014-06-19 17:36 ` [Qemu-devel] [PULL 03/14] target-arm: Add ULL suffix to calculation of page size Peter Maydell
2014-06-19 17:36 ` [Qemu-devel] [PULL 04/14] target-arm/translate-a64.c: Remove dead ?: in disas_simd_3same_int() Peter Maydell
2014-06-19 17:36 ` [Qemu-devel] [PULL 05/14] target-arm/translate-a64.c: Fix dead ?: in handle_simd_shift_fpint_conv() Peter Maydell
2014-06-19 17:36 ` [Qemu-devel] [PULL 06/14] hw/arm/vexpress: Forbid specifying flash contents in two ways at once Peter Maydell
2014-06-19 17:36 ` Peter Maydell [this message]
2014-06-19 17:36 ` [Qemu-devel] [PULL 08/14] kvm: Handle exit reason KVM_EXIT_SYSTEM_EVENT Peter Maydell
2014-06-19 17:36 ` [Qemu-devel] [PULL 09/14] target-arm: Common kvm_arm_vcpu_init() for KVM ARM and KVM ARM64 Peter Maydell
2014-06-19 17:36 ` [Qemu-devel] [PULL 10/14] target-arm: Enable KVM_ARM_VCPU_PSCI_0_2 feature when possible Peter Maydell
2014-06-19 17:36 ` [Qemu-devel] [PULL 11/14] target-arm: Implement kvm_arch_reset_vcpu() for KVM ARM64 Peter Maydell
2014-06-19 17:36 ` [Qemu-devel] [PULL 12/14] target-arm: Introduce per-CPU field for PSCI version Peter Maydell
2014-06-19 17:36 ` [Qemu-devel] [PULL 13/14] Use PSCI v0.2 compatible string when KVM or TCG provides it Peter Maydell
2014-06-19 17:36 ` [Qemu-devel] [PULL 14/14] armv7m_nvic: fix AIRCR implementation Peter Maydell
2014-06-20 17:00 ` [Qemu-devel] [PULL 00/14] target-arm queue Peter Maydell
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