From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Cc: Sanjay Lal <sanjayl@kymasys.com>,
James Hogan <james.hogan@imgtec.com>,
Aurelien Jarno <aurelien@aurel32.net>
Subject: [Qemu-devel] [PULL 04/14] hw/mips: Add API to convert KVM guest KSEG0 <-> GPA
Date: Fri, 20 Jun 2014 14:11:13 +0200 [thread overview]
Message-ID: <1403266283-1517-5-git-send-email-pbonzini@redhat.com> (raw)
In-Reply-To: <1403266283-1517-1-git-send-email-pbonzini@redhat.com>
From: Sanjay Lal <sanjayl@kymasys.com>
Add API for converting physical addresses to KVM guest KSEG0 addresses,
and fix the existing API for converting KSEG0 addresses to physical
addresses to work in the KVM case. Both have the same sized KSEG0, so
it's just a case of fixing the mask.
In KVM trap and emulate mode both the guest kernel and guest userspace
execute in useg:
Guest User address space: 0x00000000..0x3fffffff
Guest Kernel Unmapped: 0x40000000..0x5fffffff
Guest Kernel Mapped: 0x60000000..0x7fffffff
Signed-off-by: Sanjay Lal <sanjayl@kymasys.com>
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/mips/addr.c | 7 ++++++-
include/hw/mips/cpudevs.h | 2 ++
2 files changed, 8 insertions(+), 1 deletions(-)
diff --git a/hw/mips/addr.c b/hw/mips/addr.c
index 99488f1..ff3b952 100644
--- a/hw/mips/addr.c
+++ b/hw/mips/addr.c
@@ -25,10 +25,15 @@
uint64_t cpu_mips_kseg0_to_phys(void *opaque, uint64_t addr)
{
- return addr & 0x7fffffffll;
+ return addr & 0x1fffffffll;
}
uint64_t cpu_mips_phys_to_kseg0(void *opaque, uint64_t addr)
{
return addr | ~0x7fffffffll;
}
+
+uint64_t cpu_mips_kvm_um_phys_to_kseg0(void *opaque, uint64_t addr)
+{
+ return addr | 0x40000000ll;
+}
diff --git a/include/hw/mips/cpudevs.h b/include/hw/mips/cpudevs.h
index 6bea24b..b2626f2 100644
--- a/include/hw/mips/cpudevs.h
+++ b/include/hw/mips/cpudevs.h
@@ -5,6 +5,8 @@
/* mips_addr.c */
uint64_t cpu_mips_kseg0_to_phys(void *opaque, uint64_t addr);
uint64_t cpu_mips_phys_to_kseg0(void *opaque, uint64_t addr);
+uint64_t cpu_mips_kvm_um_phys_to_kseg0(void *opaque, uint64_t addr);
+
/* mips_int.c */
void cpu_mips_irq_init_cpu(CPUMIPSState *env);
--
1.7.1
next prev parent reply other threads:[~2014-06-20 12:11 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-20 12:11 [Qemu-devel] [PULL 00/14] Pending KVM patches for 2.1 Paolo Bonzini
2014-06-20 12:11 ` [Qemu-devel] [PULL 01/14] KVM: Fix GSI number space limit Paolo Bonzini
2014-06-20 12:11 ` [Qemu-devel] [PULL 02/14] target-mips: Reset CPU timer consistently Paolo Bonzini
2014-06-20 12:11 ` [Qemu-devel] [PULL 03/14] hw/mips/cputimer: Don't start periodic timer in KVM mode Paolo Bonzini
2014-06-20 12:11 ` Paolo Bonzini [this message]
2014-06-20 12:11 ` [Qemu-devel] [PULL 05/14] target-mips: get_physical_address: Add defines for segment bases Paolo Bonzini
2014-06-20 12:11 ` [Qemu-devel] [PULL 06/14] target-mips: get_physical_address: Add KVM awareness Paolo Bonzini
2014-06-20 12:11 ` [Qemu-devel] [PULL 07/14] kvm: Allow arch to set sigmask length Paolo Bonzini
2014-06-20 12:11 ` [Qemu-devel] [PULL 08/14] target-mips: kvm: Add main KVM support for MIPS Paolo Bonzini
2014-06-20 12:11 ` [Qemu-devel] [PULL 09/14] target-mips: Call kvm_mips_reset_vcpu() from mips_cpu_reset() Paolo Bonzini
2014-06-20 12:11 ` [Qemu-devel] [PULL 10/14] hw/mips: In KVM mode, inject IRQ2 (I/O) interrupts via ioctls Paolo Bonzini
2014-06-20 12:11 ` [Qemu-devel] [PULL 11/14] hw/mips: malta: Add KVM support Paolo Bonzini
2014-06-20 12:11 ` [Qemu-devel] [PULL 12/14] target-mips: Enable KVM support in build system Paolo Bonzini
2014-06-20 12:11 ` [Qemu-devel] [PULL 13/14] MAINTAINERS: Add entry for MIPS KVM Paolo Bonzini
2014-06-20 12:11 ` [Qemu-devel] [PULL 14/14] hw/mips: malta: Don't boot from flash with KVM T&E Paolo Bonzini
2014-06-20 19:01 ` [Qemu-devel] [PULL 00/14] Pending KVM patches for 2.1 Peter Maydell
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