From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53752) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WyKsj-0002jZ-1C for qemu-devel@nongnu.org; Sat, 21 Jun 2014 08:59:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WyKsZ-0007Zs-TT for qemu-devel@nongnu.org; Sat, 21 Jun 2014 08:58:56 -0400 Received: from mail-wi0-x22d.google.com ([2a00:1450:400c:c05::22d]:59230) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WyKsZ-0007Ze-MW for qemu-devel@nongnu.org; Sat, 21 Jun 2014 08:58:47 -0400 Received: by mail-wi0-f173.google.com with SMTP id cc10so1994876wib.12 for ; Sat, 21 Jun 2014 05:58:46 -0700 (PDT) Sender: Paolo Bonzini From: Paolo Bonzini Date: Sat, 21 Jun 2014 14:58:20 +0200 Message-Id: <1403355502-12288-10-git-send-email-pbonzini@redhat.com> In-Reply-To: <1403355502-12288-1-git-send-email-pbonzini@redhat.com> References: <1403355502-12288-1-git-send-email-pbonzini@redhat.com> Subject: [Qemu-devel] [PATCH v3 09/11] target-arm: implement setend List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org Since this is not a high-performance path, just use a helper to flip the E bit and force a lookup in the hash table since the flags have changed. Signed-off-by: Paolo Bonzini --- target-arm/helper.h | 1 + target-arm/op_helper.c | 5 +++++ target-arm/translate.c | 12 ++++++------ 3 files changed, 12 insertions(+), 6 deletions(-) diff --git a/target-arm/helper.h b/target-arm/helper.h index facfcd2..c7e3949 100644 --- a/target-arm/helper.h +++ b/target-arm/helper.h @@ -48,6 +48,7 @@ DEF_HELPER_FLAGS_3(sel_flags, TCG_CALL_NO_RWG_SE, i32, i32, i32, i32) DEF_HELPER_2(exception_internal, void, env, i32) DEF_HELPER_3(exception_with_syndrome, void, env, i32, i32) +DEF_HELPER_1(setend, void, env) DEF_HELPER_1(wfi, void, env) DEF_HELPER_1(wfe, void, env) diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c index 9c1ef52..30eea14 100644 --- a/target-arm/op_helper.c +++ b/target-arm/op_helper.c @@ -209,6 +209,11 @@ uint32_t HELPER(usat16)(CPUARMState *env, uint32_t x, uint32_t shift) return res; } +void HELPER(setend)(CPUARMState *env) +{ + env->uncached_cpsr ^= CPSR_E; +} + void HELPER(wfi)(CPUARMState *env) { CPUState *cs = CPU(arm_env_get_cpu(env)); diff --git a/target-arm/translate.c b/target-arm/translate.c index 8be8f21..30e3586 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -7561,9 +7561,9 @@ static void disas_arm_insn(CPUARMState * env, DisasContext *s) ARCH(6); /* setend */ if (((insn >> 9) & 1) != s->cpsr_e) { - /* Dynamic endianness switching not implemented. */ - qemu_log_mask(LOG_UNIMP, "arm: unimplemented setend\n"); - goto illegal_op; + gen_helper_setend(cpu_env); + gen_set_pc_im(s, s->pc); + s->is_jmp = DISAS_JUMP; } return; } else if ((insn & 0x0fffff00) == 0x057ff000) { @@ -10728,9 +10728,9 @@ static void disas_thumb_insn(CPUARMState *env, DisasContext *s) /* setend */ ARCH(6); if (((insn >> 3) & 1) != s->cpsr_e) { - /* Dynamic endianness switching not implemented. */ - qemu_log_mask(LOG_UNIMP, "arm: unimplemented setend\n"); - goto illegal_op; + gen_helper_setend(cpu_env); + gen_set_pc_im(s, s->pc); + s->is_jmp = DISAS_JUMP; } break; case 3: -- 1.9.3