From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: bochs-developers@lists.sourceforge.net
Cc: "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] Endian control register
Date: Mon, 23 Jun 2014 13:32:27 +1000 [thread overview]
Message-ID: <1403494347.4587.122.camel@pasglop> (raw)
In-Reply-To: <1403484330.4587.118.camel@pasglop>
On Mon, 2014-06-23 at 10:45 +1000, Benjamin Herrenschmidt wrote:
>
> Another option would be to use an unused bit if the ENABLE register
> and simply force it to 1 on reads when the endian control register
> is present... though in this case it might be a better idea to use
> that bit to indicate the presence of "extended flags", use a new
> register 0xb as "EXTENDED_FLAGS", and use a flag in there as indicative
> of the presence of endian control which becomes register 0xc.
>
> That way you also have room for more extensions if you wish to do
> so in the future.
I just remembered... we use 16-bit wide ports, we could just use the
top 8 bits of the enable register as "capabilities" ...
Cheers,
Ben.
prev parent reply other threads:[~2014-06-23 3:32 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-16 10:30 [Qemu-devel] Endian control register Benjamin Herrenschmidt
2014-06-16 10:45 ` Peter Maydell
2014-06-16 11:07 ` Benjamin Herrenschmidt
2014-06-23 0:43 ` Benjamin Herrenschmidt
2014-06-23 0:45 ` Benjamin Herrenschmidt
2014-06-23 3:32 ` Benjamin Herrenschmidt [this message]
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