From: Alexander Graf <agraf@suse.de>
To: qemu-ppc@nongnu.org
Cc: Alexey Kardashevskiy <aik@ozlabs.ru>,
peter.maydell@linaro.org, qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 11/32] spapr_pci_vfio: Add spapr-pci-vfio-host-bridge to support vfio
Date: Fri, 27 Jun 2014 13:52:03 +0200 [thread overview]
Message-ID: <1403869944-31927-12-git-send-email-agraf@suse.de> (raw)
In-Reply-To: <1403869944-31927-1-git-send-email-agraf@suse.de>
From: Alexey Kardashevskiy <aik@ozlabs.ru>
The patch adds a spapr-pci-vfio-host-bridge device type
which is a PCI Host Bridge with VFIO support. The new device
inherits from the spapr-pci-host-bridge device and adds an "iommu"
property which is an IOMMU id. This ID represents a minimal entity
for which IOMMU isolation can be guaranteed. In SPAPR architecture IOMMU
group is called a Partitionable Endpoint (PE).
Current implementation supports one IOMMU id per QEMU VFIO PHB. Since
SPAPR allows multiple PHB for no extra cost, this does not seem to
be a problem. This limitation may change in the future though.
Example of use:
Configure and Add 3 functions of a multifunctional device to QEMU:
(the NEC PCI USB card is used as an example here):
-device spapr-pci-vfio-host-bridge,id=USB,iommu=4,index=7 \
-device vfio-pci,host=4:0:1.0,addr=1.0,bus=USB,multifunction=true
-device vfio-pci,host=4:0:1.1,addr=1.1,bus=USB
-device vfio-pci,host=4:0:1.2,addr=1.2,bus=USB
where:
* index=7 is a QEMU PHB index (used as source for MMIO/MSI/IO windows
offset);
* iommu=4 is an IOMMU id which can be found in sysfs:
[aik@vpl2 ~]$ cd /sys/bus/pci/devices/0004:00:00.0/
[aik@vpl2 0004:00:00.0]$ ls -l iommu_group
lrwxrwxrwx 1 root root 0 Jun 5 12:49 iommu_group -> ../../../kernel/iommu_groups/4
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Alexander Graf <agraf@suse.de>
---
hw/ppc/Makefile.objs | 3 ++
hw/ppc/spapr_pci_vfio.c | 102 ++++++++++++++++++++++++++++++++++++++++++++
include/hw/pci-host/spapr.h | 11 +++++
3 files changed, 116 insertions(+)
create mode 100644 hw/ppc/spapr_pci_vfio.c
diff --git a/hw/ppc/Makefile.objs b/hw/ppc/Makefile.objs
index ea747f0..edd44d0 100644
--- a/hw/ppc/Makefile.objs
+++ b/hw/ppc/Makefile.objs
@@ -4,6 +4,9 @@ obj-y += ppc.o ppc_booke.o
obj-$(CONFIG_PSERIES) += spapr.o spapr_vio.o spapr_events.o
obj-$(CONFIG_PSERIES) += spapr_hcall.o spapr_iommu.o spapr_rtas.o
obj-$(CONFIG_PSERIES) += spapr_pci.o
+ifeq ($(CONFIG_PCI)$(CONFIG_PSERIES)$(CONFIG_LINUX), yyy)
+obj-y += spapr_pci_vfio.o
+endif
# PowerPC 4xx boards
obj-y += ppc405_boards.o ppc4xx_devs.o ppc405_uc.o ppc440_bamboo.o
obj-y += ppc4xx_pci.o
diff --git a/hw/ppc/spapr_pci_vfio.c b/hw/ppc/spapr_pci_vfio.c
new file mode 100644
index 0000000..d3bddf2
--- /dev/null
+++ b/hw/ppc/spapr_pci_vfio.c
@@ -0,0 +1,102 @@
+/*
+ * QEMU sPAPR PCI host for VFIO
+ *
+ * Copyright (c) 2011-2014 Alexey Kardashevskiy, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License,
+ * or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "hw/ppc/spapr.h"
+#include "hw/pci-host/spapr.h"
+#include "linux/vfio.h"
+#include "hw/misc/vfio.h"
+
+static Property spapr_phb_vfio_properties[] = {
+ DEFINE_PROP_INT32("iommu", sPAPRPHBVFIOState, iommugroupid, -1),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void spapr_phb_vfio_finish_realize(sPAPRPHBState *sphb, Error **errp)
+{
+ sPAPRPHBVFIOState *svphb = SPAPR_PCI_VFIO_HOST_BRIDGE(sphb);
+ struct vfio_iommu_spapr_tce_info info = { .argsz = sizeof(info) };
+ int ret;
+ sPAPRTCETable *tcet;
+ uint32_t liobn = svphb->phb.dma_liobn;
+
+ if (svphb->iommugroupid == -1) {
+ error_setg(errp, "Wrong IOMMU group ID %d", svphb->iommugroupid);
+ return;
+ }
+
+ ret = vfio_container_ioctl(&svphb->phb.iommu_as, svphb->iommugroupid,
+ VFIO_CHECK_EXTENSION,
+ (void *) VFIO_SPAPR_TCE_IOMMU);
+ if (ret != 1) {
+ error_setg_errno(errp, -ret,
+ "spapr-vfio: SPAPR extension is not supported");
+ return;
+ }
+
+ ret = vfio_container_ioctl(&svphb->phb.iommu_as, svphb->iommugroupid,
+ VFIO_IOMMU_SPAPR_TCE_GET_INFO, &info);
+ if (ret) {
+ error_setg_errno(errp, -ret,
+ "spapr-vfio: get info from container failed");
+ return;
+ }
+
+ tcet = spapr_tce_new_table(DEVICE(sphb), liobn, info.dma32_window_start,
+ SPAPR_TCE_PAGE_SHIFT,
+ info.dma32_window_size >> SPAPR_TCE_PAGE_SHIFT,
+ true);
+ if (!tcet) {
+ error_setg(errp, "spapr-vfio: failed to create VFIO TCE table");
+ return;
+ }
+
+ /* Register default 32bit DMA window */
+ memory_region_add_subregion(&sphb->iommu_root, tcet->bus_offset,
+ spapr_tce_get_iommu(tcet));
+}
+
+static void spapr_phb_vfio_reset(DeviceState *qdev)
+{
+ /* Do nothing */
+}
+
+static void spapr_phb_vfio_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+ sPAPRPHBClass *spc = SPAPR_PCI_HOST_BRIDGE_CLASS(klass);
+
+ dc->props = spapr_phb_vfio_properties;
+ dc->reset = spapr_phb_vfio_reset;
+ spc->finish_realize = spapr_phb_vfio_finish_realize;
+}
+
+static const TypeInfo spapr_phb_vfio_info = {
+ .name = TYPE_SPAPR_PCI_VFIO_HOST_BRIDGE,
+ .parent = TYPE_SPAPR_PCI_HOST_BRIDGE,
+ .instance_size = sizeof(sPAPRPHBVFIOState),
+ .class_init = spapr_phb_vfio_class_init,
+ .class_size = sizeof(sPAPRPHBClass),
+};
+
+static void spapr_pci_vfio_register_types(void)
+{
+ type_register_static(&spapr_phb_vfio_info);
+}
+
+type_init(spapr_pci_vfio_register_types)
diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h
index 0934518..6808e96 100644
--- a/include/hw/pci-host/spapr.h
+++ b/include/hw/pci-host/spapr.h
@@ -30,10 +30,14 @@
#define SPAPR_MSIX_MAX_DEVS 32
#define TYPE_SPAPR_PCI_HOST_BRIDGE "spapr-pci-host-bridge"
+#define TYPE_SPAPR_PCI_VFIO_HOST_BRIDGE "spapr-pci-vfio-host-bridge"
#define SPAPR_PCI_HOST_BRIDGE(obj) \
OBJECT_CHECK(sPAPRPHBState, (obj), TYPE_SPAPR_PCI_HOST_BRIDGE)
+#define SPAPR_PCI_VFIO_HOST_BRIDGE(obj) \
+ OBJECT_CHECK(sPAPRPHBVFIOState, (obj), TYPE_SPAPR_PCI_VFIO_HOST_BRIDGE)
+
#define SPAPR_PCI_HOST_BRIDGE_CLASS(klass) \
OBJECT_CLASS_CHECK(sPAPRPHBClass, (klass), TYPE_SPAPR_PCI_HOST_BRIDGE)
#define SPAPR_PCI_HOST_BRIDGE_GET_CLASS(obj) \
@@ -41,6 +45,7 @@
typedef struct sPAPRPHBClass sPAPRPHBClass;
typedef struct sPAPRPHBState sPAPRPHBState;
+typedef struct sPAPRPHBVFIOState sPAPRPHBVFIOState;
struct sPAPRPHBClass {
PCIHostBridgeClass parent_class;
@@ -76,6 +81,12 @@ struct sPAPRPHBState {
QLIST_ENTRY(sPAPRPHBState) list;
};
+struct sPAPRPHBVFIOState {
+ sPAPRPHBState phb;
+
+ int32_t iommugroupid;
+};
+
#define SPAPR_PCI_BASE_BUID 0x800000020000000ULL
#define SPAPR_PCI_WINDOW_BASE 0x10000000000ULL
--
1.8.1.4
next prev parent reply other threads:[~2014-06-27 11:52 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-27 11:51 [Qemu-devel] [PULL 00/32] ppc patch queue 2014-06-27 Alexander Graf
2014-06-27 11:51 ` [Qemu-devel] [PULL 01/32] linux-user: Correct AUXV Cache Line Sizes for PowerPC Alexander Graf
2014-06-27 11:51 ` [Qemu-devel] [PULL 02/32] target-ppc: Add DFP to Emulated Instructions Flag Alexander Graf
2014-06-27 11:51 ` [Qemu-devel] [PULL 03/32] linux-user: Identify Addition Hardware Capabilities for PowerPC Alexander Graf
2014-06-27 11:51 ` [Qemu-devel] [PULL 04/32] linux-user: Support HWCAP2 in PowerPC Alexander Graf
2014-06-27 11:51 ` [Qemu-devel] [PULL 05/32] spapr: Add "qemu, boot-menu" property to /chosen Alexander Graf
2014-06-27 11:51 ` [Qemu-devel] [PULL 06/32] target-ppc: fixed translation of mcrxr instruction Alexander Graf
2014-06-27 11:51 ` [Qemu-devel] [PULL 07/32] PPC: Add support for Apple gdb in gdbstub Alexander Graf
2014-06-27 11:52 ` [Qemu-devel] [PULL 08/32] spapr: Fix RTAS token numbers Alexander Graf
2014-06-27 11:52 ` [Qemu-devel] [PULL 09/32] spapr_iommu: Make in-kernel TCE table optional Alexander Graf
2014-06-27 11:52 ` [Qemu-devel] [PULL 10/32] vfio: Add vfio_container_ioctl() Alexander Graf
2014-06-27 11:52 ` Alexander Graf [this message]
2014-06-27 11:52 ` [Qemu-devel] [PULL 12/32] vfio: Enable for SPAPR Alexander Graf
2014-06-27 11:52 ` [Qemu-devel] [PULL 13/32] target-ppc: Remove unused IMM and d extract helpers Alexander Graf
2014-06-27 11:52 ` [Qemu-devel] [PULL 14/32] target-ppc: Remove unused gen_qemu_ld8s() Alexander Graf
2014-06-27 11:52 ` [Qemu-devel] [PULL 15/32] mac99: Add motherboard devices before PCI cards Alexander Graf
2014-06-27 11:52 ` [Qemu-devel] [PULL 16/32] uninorth: Fix PCI hole size Alexander Graf
2014-06-27 11:52 ` [Qemu-devel] [PULL 17/32] target-ppc: Add support for POWER8 pvr 0x4D0000 Alexander Graf
2014-06-27 11:52 ` [Qemu-devel] [PULL 18/32] spapr: Fix code design style (s/SPAPRMachine/sPAPRMachineState) Alexander Graf
2014-06-27 11:52 ` [Qemu-devel] [PULL 19/32] spapr: Define a 2.1 pseries machine Alexander Graf
2014-06-27 11:52 ` [Qemu-devel] [PULL 20/32] spapr: Add rtas_st_buffer utility function Alexander Graf
2014-06-27 11:52 ` [Qemu-devel] [PULL 21/32] spapr: Fix RTAS sysparm DIAGNOSTICS_RUN_MODE Alexander Graf
2014-06-27 11:52 ` [Qemu-devel] [PULL 22/32] spapr: Add RTAS sysparm UUID Alexander Graf
2014-06-27 11:52 ` [Qemu-devel] [PULL 23/32] spapr: Add RTAS sysparm SPLPAR Characteristics Alexander Graf
2014-06-27 11:52 ` [Qemu-devel] [PULL 24/32] xics: Add flags for interrupts Alexander Graf
2014-06-27 11:52 ` [Qemu-devel] [PULL 25/32] xics: Add xics_find_source() Alexander Graf
2014-06-27 11:52 ` [Qemu-devel] [PULL 26/32] xics: Disable flags reset on xics reset Alexander Graf
2014-06-27 11:52 ` [Qemu-devel] [PULL 27/32] spapr: Move interrupt allocator to xics Alexander Graf
2014-06-27 11:52 ` [Qemu-devel] [PULL 28/32] spapr: Remove @next_irq Alexander Graf
2014-06-27 11:52 ` [Qemu-devel] [PULL 29/32] xics: Implement xics_ics_free() Alexander Graf
2014-06-27 11:52 ` [Qemu-devel] [PULL 30/32] vmstate: Add preallocation for migrating arrays (VMS_ALLOC flag) Alexander Graf
2014-06-27 11:52 ` [Qemu-devel] [PULL 31/32] spapr_pci: Use XICS interrupt allocator and do not cache interrupts in PHB Alexander Graf
2014-10-17 17:08 ` Peter Maydell
2014-06-27 11:52 ` [Qemu-devel] [PULL 32/32] PPC: e500: Only create dt entries for existing serial ports Alexander Graf
2014-06-29 11:38 ` [Qemu-devel] [PULL 00/32] ppc patch queue 2014-06-27 Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1403869944-31927-12-git-send-email-agraf@suse.de \
--to=agraf@suse.de \
--cc=aik@ozlabs.ru \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).