From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52956) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X1kic-0005Y5-Ix for qemu-devel@nongnu.org; Mon, 30 Jun 2014 19:10:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1X1kiR-00036O-J5 for qemu-devel@nongnu.org; Mon, 30 Jun 2014 19:10:38 -0400 Received: from mail-ob0-f173.google.com ([209.85.214.173]:44101) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X1kiR-000360-Dh for qemu-devel@nongnu.org; Mon, 30 Jun 2014 19:10:27 -0400 Received: by mail-ob0-f173.google.com with SMTP id va2so9747362obc.32 for ; Mon, 30 Jun 2014 16:10:27 -0700 (PDT) From: greg.bellows@linaro.org Date: Mon, 30 Jun 2014 18:09:03 -0500 Message-Id: <1404169773-20264-4-git-send-email-greg.bellows@linaro.org> In-Reply-To: <1404169773-20264-1-git-send-email-greg.bellows@linaro.org> References: <1404169773-20264-1-git-send-email-greg.bellows@linaro.org> Subject: [Qemu-devel] [PATCH v4 03/33] target-arm: increase arrays of registers R13 & R14 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, peter.crosthwaite@xilinx.com, Fabian Aggeler , Greg Bellows , serge.fdrv@gmail.com, edgar.iglesias@gmail.com, christoffer.dall@linaro.org From: Fabian Aggeler Increasing banked_r13 and banked_r14 to store LR_mon and SP_mon (bank index 7). Signed-off-by: Fabian Aggeler Reviewed-by: Edgar E. Iglesias Signed-off-by: Greg Bellows --- target-arm/cpu.h | 4 ++-- target-arm/machine.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 5accbde..ffc51f2 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -153,8 +153,8 @@ typedef struct CPUARMState { /* Banked registers. */ uint64_t banked_spsr[8]; - uint32_t banked_r13[6]; - uint32_t banked_r14[6]; + uint32_t banked_r13[8]; + uint32_t banked_r14[8]; /* These hold r8-r12. */ uint32_t usr_regs[5]; diff --git a/target-arm/machine.c b/target-arm/machine.c index 3bcc7cc..5ed495e 100644 --- a/target-arm/machine.c +++ b/target-arm/machine.c @@ -234,8 +234,8 @@ const VMStateDescription vmstate_arm_cpu = { }, VMSTATE_UINT32(env.spsr, ARMCPU), VMSTATE_UINT64_ARRAY(env.banked_spsr, ARMCPU, 8), - VMSTATE_UINT32_ARRAY(env.banked_r13, ARMCPU, 6), - VMSTATE_UINT32_ARRAY(env.banked_r14, ARMCPU, 6), + VMSTATE_UINT32_ARRAY(env.banked_r13, ARMCPU, 8), + VMSTATE_UINT32_ARRAY(env.banked_r14, ARMCPU, 8), VMSTATE_UINT32_ARRAY(env.usr_regs, ARMCPU, 5), VMSTATE_UINT32_ARRAY(env.fiq_regs, ARMCPU, 5), VMSTATE_UINT64_ARRAY(env.elr_el, ARMCPU, 4), -- 1.8.3.2