From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37518) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X4ubs-0003HA-Lh for qemu-devel@nongnu.org; Wed, 09 Jul 2014 12:20:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1X4ubm-0005EB-VZ for qemu-devel@nongnu.org; Wed, 09 Jul 2014 12:20:44 -0400 Received: from mail-pd0-x22a.google.com ([2607:f8b0:400e:c02::22a]:51615) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X4ubm-0005E4-Lq for qemu-devel@nongnu.org; Wed, 09 Jul 2014 12:20:38 -0400 Received: by mail-pd0-f170.google.com with SMTP id z10so9315963pdj.29 for ; Wed, 09 Jul 2014 09:20:37 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Wed, 9 Jul 2014 09:20:16 -0700 Message-Id: <1404922834-28169-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PULL for-2.1 00/18] target-alpha patch queue List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, viro@ZenIV.linux.org.uk The queue consists of Al Viro's recent work looking at the dark corner cases of Alpha FPU exception signalling, for which I am most grateful. Please pull for 2.1. r~ The following changes since commit 9d9de254c2b81b68cd48f2324cc753a570a4cdd8: MAINTAINERS: seccomp: change email contact for Eduardo Otubo (2014-07-03 12:36:15 +0100) are available in the git repository at: git://github.com/rth7680/qemu.git axp-next for you to fetch changes up to e465bbb9a96d000b9884a47a037ab92574fb89f7: target-alpha: Remove DNOD bit from FPCR (2014-07-09 08:40:09 -0700) ---------------------------------------------------------------- Richard Henderson (18): target-alpha: Forget installed round mode after MT_FPCR target-alpha: Set PC correctly for floating-point exceptions target-alpha: Store IOV exception in fp_status target-alpha: Set fpcr_exc_status even for disabled exceptions target-alpha: Set EXC_M_SWC for exceptions from /S insns target-alpha: Raise IOV from CVTTQ target-alpha: Fix cvttq vs large integers target-alpha: Fix cvttq vs inf target-alpha: Fix integer overflow checking insns target-alpha: Implement WH64EN target-alpha: Disallow literal operand to 1C.30 to 1C.37 target-alpha: Ignore the unused fp_status exceptions target-alpha: Raise EXC_M_INV properly for fp inputs target-alpha: Suppress underflow from CVTTQ if DNZ target-alpha: Raise IOV from CVTQL target-alpha: Rename fcvtql target-alpha: Fix fpcr_flush_to_zero initialization target-alpha: Remove DNOD bit from FPCR include/fpu/softfloat.h | 13 ++-- target-alpha/cpu.h | 1 - target-alpha/fpu_helper.c | 139 +++++++++++++++++++-------------- target-alpha/helper.c | 19 +++-- target-alpha/helper.h | 12 +-- target-alpha/int_helper.c | 59 +------------- target-alpha/mem_helper.c | 9 ++- target-alpha/translate.c | 191 +++++++++++++++++++++++++++------------------- 8 files changed, 227 insertions(+), 216 deletions(-)