From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37786) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X4ucH-0003Mp-At for qemu-devel@nongnu.org; Wed, 09 Jul 2014 12:21:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1X4ucC-0005KZ-57 for qemu-devel@nongnu.org; Wed, 09 Jul 2014 12:21:09 -0400 Received: from mail-pd0-x230.google.com ([2607:f8b0:400e:c02::230]:38298) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X4ucB-0005KT-SP for qemu-devel@nongnu.org; Wed, 09 Jul 2014 12:21:04 -0400 Received: by mail-pd0-f176.google.com with SMTP id ft15so9241163pdb.35 for ; Wed, 09 Jul 2014 09:21:03 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Wed, 9 Jul 2014 09:20:31 -0700 Message-Id: <1404922834-28169-16-git-send-email-rth@twiddle.net> In-Reply-To: <1404922834-28169-1-git-send-email-rth@twiddle.net> References: <1404922834-28169-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PULL 15/18] target-alpha: Raise IOV from CVTQL List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, viro@ZenIV.linux.org.uk Even if an exception isn't taken, the status flags need updating and the result should be written to the destination. Move the body of cvtql out of line, since we now always need a call. Reported-by: Al Viro Signed-off-by: Richard Henderson --- target-alpha/fpu_helper.c | 8 ++++++-- target-alpha/helper.h | 3 ++- target-alpha/translate.c | 34 +++++----------------------------- 3 files changed, 13 insertions(+), 32 deletions(-) diff --git a/target-alpha/fpu_helper.c b/target-alpha/fpu_helper.c index 796d907..67d9a5b 100644 --- a/target-alpha/fpu_helper.c +++ b/target-alpha/fpu_helper.c @@ -842,9 +842,13 @@ uint64_t helper_cvtqg(CPUAlphaState *env, uint64_t a) return float64_to_g(fr); } -void helper_fcvtql_v_input(CPUAlphaState *env, uint64_t val) +uint64_t helper_cvtql(CPUAlphaState *env, uint64_t val) { + int exc = 0; if (val != (int32_t)val) { - arith_excp(env, GETPC(), EXC_M_IOV, 0); + exc = float_flag_int_overflow | float_flag_inexact; } + set_float_exception_flags(exc, &FP_STATUS); + + return ((val & 0xc0000000) << 32) | ((val & 0x3fffffff) << 29); } diff --git a/target-alpha/helper.h b/target-alpha/helper.h index 596f24d..128f7a1 100644 --- a/target-alpha/helper.h +++ b/target-alpha/helper.h @@ -79,6 +79,8 @@ DEF_HELPER_FLAGS_2(cvtqg, TCG_CALL_NO_RWG, i64, env, i64) DEF_HELPER_FLAGS_2(cvttq, TCG_CALL_NO_RWG, i64, env, i64) DEF_HELPER_FLAGS_2(cvttq_c, TCG_CALL_NO_RWG, i64, env, i64) +DEF_HELPER_FLAGS_2(cvtql, TCG_CALL_NO_RWG, i64, env, i64) + DEF_HELPER_FLAGS_2(setroundmode, TCG_CALL_NO_RWG, void, env, i32) DEF_HELPER_FLAGS_2(setflushzero, TCG_CALL_NO_RWG, void, env, i32) DEF_HELPER_FLAGS_1(fp_exc_clear, TCG_CALL_NO_RWG, void, env) @@ -89,7 +91,6 @@ DEF_HELPER_FLAGS_3(fp_exc_raise_s, TCG_CALL_NO_WG, void, env, i32, i32) DEF_HELPER_FLAGS_2(ieee_input, TCG_CALL_NO_WG, void, env, i64) DEF_HELPER_FLAGS_2(ieee_input_cmp, TCG_CALL_NO_WG, void, env, i64) DEF_HELPER_FLAGS_2(ieee_input_s, TCG_CALL_NO_WG, void, env, i64) -DEF_HELPER_FLAGS_2(fcvtql_v_input, TCG_CALL_NO_WG, void, env, i64) #if !defined (CONFIG_USER_ONLY) DEF_HELPER_2(hw_ret, void, env, i64) diff --git a/target-alpha/translate.c b/target-alpha/translate.c index 3a7c2ba..8ad098a 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c @@ -729,19 +729,6 @@ static void gen_fcvtlq(TCGv vc, TCGv vb) tcg_temp_free(tmp); } -static void gen_fcvtql(TCGv vc, TCGv vb) -{ - TCGv tmp = tcg_temp_new(); - - tcg_gen_andi_i64(tmp, vb, (int32_t)0xc0000000); - tcg_gen_andi_i64(vc, vb, 0x3FFFFFFF); - tcg_gen_shli_i64(tmp, tmp, 32); - tcg_gen_shli_i64(vc, vc, 29); - tcg_gen_or_i64(vc, vc, tmp); - - tcg_temp_free(tmp); -} - static void gen_ieee_arith2(DisasContext *ctx, void (*helper)(TCGv, TCGv_ptr, TCGv), int rb, int rc, int fn11) @@ -2269,25 +2256,14 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn) /* FCMOVGT */ gen_fcmov(ctx, TCG_COND_GT, ra, rb, rc); break; - case 0x030: - /* CVTQL */ - REQUIRE_REG_31(ra); - vc = dest_fpr(ctx, rc); - vb = load_fpr(ctx, rb); - gen_fcvtql(vc, vb); - break; - case 0x130: - /* CVTQL/V */ - case 0x530: - /* CVTQL/SV */ + case 0x030: /* CVTQL */ + case 0x130: /* CVTQL/V */ + case 0x530: /* CVTQL/SV */ REQUIRE_REG_31(ra); - /* ??? I'm pretty sure there's nothing that /sv needs to do that - /v doesn't do. The only thing I can think is that /sv is a - valid instruction merely for completeness in the ISA. */ vc = dest_fpr(ctx, rc); vb = load_fpr(ctx, rb); - gen_helper_fcvtql_v_input(cpu_env, vb); - gen_fcvtql(vc, vb); + gen_helper_cvtql(vc, cpu_env, vb); + gen_fp_exc_raise(rc, fn11); break; default: goto invalid_opc; -- 1.9.3