From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37829) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X4ucL-0003NH-OL for qemu-devel@nongnu.org; Wed, 09 Jul 2014 12:21:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1X4ucG-0005MC-Io for qemu-devel@nongnu.org; Wed, 09 Jul 2014 12:21:13 -0400 Received: from mail-pd0-x22d.google.com ([2607:f8b0:400e:c02::22d]:35006) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X4ucG-0005Lw-Bq for qemu-devel@nongnu.org; Wed, 09 Jul 2014 12:21:08 -0400 Received: by mail-pd0-f173.google.com with SMTP id r10so9207460pdi.4 for ; Wed, 09 Jul 2014 09:21:07 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Wed, 9 Jul 2014 09:20:34 -0700 Message-Id: <1404922834-28169-19-git-send-email-rth@twiddle.net> In-Reply-To: <1404922834-28169-1-git-send-email-rth@twiddle.net> References: <1404922834-28169-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PULL 18/18] target-alpha: Remove DNOD bit from FPCR List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, viro@ZenIV.linux.org.uk It was never implemented, thus even for EV6 and EV7 the bit is read-as-zero, writes-ignored. Reported-by: Al Viro Signed-off-by: Richard Henderson --- target-alpha/cpu.h | 1 - target-alpha/helper.c | 8 +++----- 2 files changed, 3 insertions(+), 6 deletions(-) diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h index d9b861f..d3a6a4e 100644 --- a/target-alpha/cpu.h +++ b/target-alpha/cpu.h @@ -246,7 +246,6 @@ struct CPUAlphaState { uint8_t fpcr_exc_mask; uint8_t fpcr_dyn_round; uint8_t fpcr_flush_to_zero; - uint8_t fpcr_dnod; uint8_t fpcr_undz; /* The Internal Processor Registers. Some of these we assume always diff --git a/target-alpha/helper.c b/target-alpha/helper.c index 26d5188..d0b4964 100644 --- a/target-alpha/helper.c +++ b/target-alpha/helper.c @@ -88,19 +88,17 @@ uint64_t cpu_alpha_load_fpcr (CPUAlphaState *env) if (env->fp_status.flush_inputs_to_zero) { r |= FPCR_DNZ; } - if (env->fpcr_dnod) { - r |= FPCR_DNOD; - } if (env->fpcr_undz) { r |= FPCR_UNDZ; } + /* DNOD was never implemented in hardware. */ return r; } void cpu_alpha_store_fpcr (CPUAlphaState *env, uint64_t val) { - uint8_t t; + int t; t = 0; if (val & FPCR_INV) { @@ -157,11 +155,11 @@ void cpu_alpha_store_fpcr (CPUAlphaState *env, uint64_t val) } env->fpcr_dyn_round = t; - env->fpcr_dnod = (val & FPCR_DNOD) != 0; env->fpcr_undz = (val & FPCR_UNDZ) != 0; env->fp_status.flush_inputs_to_zero = (val & FPCR_DNZ) != 0; env->fpcr_flush_to_zero = (val & (FPCR_UNDZ | FPCR_UNFD)) == (FPCR_UNDZ | FPCR_UNFD); + /* DNOD was never implemented in hardware. */ } uint64_t helper_load_fpcr(CPUAlphaState *env) -- 1.9.3