From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55277) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X5Gpn-0000Ve-Dg for qemu-devel@nongnu.org; Thu, 10 Jul 2014 12:04:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1X5Gpi-0004F0-Cj for qemu-devel@nongnu.org; Thu, 10 Jul 2014 12:04:35 -0400 Received: from mail-we0-x230.google.com ([2a00:1450:400c:c03::230]:57664) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X5Gpi-0004Ej-6t for qemu-devel@nongnu.org; Thu, 10 Jul 2014 12:04:30 -0400 Received: by mail-we0-f176.google.com with SMTP id u56so9285562wes.7 for ; Thu, 10 Jul 2014 09:04:29 -0700 (PDT) Sender: Paolo Bonzini From: Paolo Bonzini Date: Thu, 10 Jul 2014 18:04:04 +0200 Message-Id: <1405008253-9816-2-git-send-email-pbonzini@redhat.com> In-Reply-To: <1405008253-9816-1-git-send-email-pbonzini@redhat.com> References: <1405008253-9816-1-git-send-email-pbonzini@redhat.com> Subject: [Qemu-devel] [PULL 01/10] mips/kvm: Init EBase to correct KSEG0 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: James Hogan , Aurelien Jarno From: James Hogan The EBase CP0 register is initialised to 0x80000000, however with KVM the guest's KSEG0 is at 0x40000000. The incorrect value doesn't get passed to KVM yet as KVM doesn't implement the EBase register, however we should set it correctly now so as not to break migration/loadvm to a future version of QEMU that does support EBase. Cc: Aurelien Jarno Cc: Paolo Bonzini Signed-off-by: James Hogan Reviewed-by: Aurelien Jarno Signed-off-by: Paolo Bonzini --- target-mips/translate.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/target-mips/translate.c b/target-mips/translate.c index 2f91959..d7b8c4d 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -28,6 +28,7 @@ #include "exec/helper-proto.h" #include "exec/helper-gen.h" +#include "sysemu/kvm.h" #define MIPS_DEBUG_DISAS 0 //#define MIPS_DEBUG_SIGN_EXTENSIONS @@ -16076,7 +16077,12 @@ void cpu_state_reset(CPUMIPSState *env) env->CP0_Random = env->tlb->nb_tlb - 1; env->tlb->tlb_in_use = env->tlb->nb_tlb; env->CP0_Wired = 0; - env->CP0_EBase = 0x80000000 | (cs->cpu_index & 0x3FF); + env->CP0_EBase = (cs->cpu_index & 0x3FF); + if (kvm_enabled()) { + env->CP0_EBase |= 0x40000000; + } else { + env->CP0_EBase |= 0x80000000; + } env->CP0_Status = (1 << CP0St_BEV) | (1 << CP0St_ERL); /* vectored interrupts not implemented, timer on int 7, no performance counters. */ -- 1.8.3.1