From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57164) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X5YIG-0003I4-RO for qemu-devel@nongnu.org; Fri, 11 Jul 2014 06:43:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1X5YIA-00039E-9o for qemu-devel@nongnu.org; Fri, 11 Jul 2014 06:43:08 -0400 Received: from mx1.redhat.com ([209.132.183.28]:38904) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X5YIA-00038g-14 for qemu-devel@nongnu.org; Fri, 11 Jul 2014 06:43:02 -0400 From: Gerd Hoffmann Date: Fri, 11 Jul 2014 12:24:37 +0200 Message-Id: <1405074278-16230-3-git-send-email-kraxel@redhat.com> In-Reply-To: <1405074278-16230-1-git-send-email-kraxel@redhat.com> References: <1405074278-16230-1-git-send-email-kraxel@redhat.com> Subject: [Qemu-devel] [PULL 2/3] cirrus: Fix build of debug code List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Gerd Hoffmann From: Benjamin Herrenschmidt Use PRIu64 to print uint64_t Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Gerd Hoffmann --- hw/display/cirrus_vga.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/display/cirrus_vga.c b/hw/display/cirrus_vga.c index 52d039e..db330e9 100644 --- a/hw/display/cirrus_vga.c +++ b/hw/display/cirrus_vga.c @@ -2059,7 +2059,7 @@ static void cirrus_vga_mem_write(void *opaque, } } else { #ifdef DEBUG_CIRRUS - printf("cirrus: mem_writeb " TARGET_FMT_plx " value %02x\n", addr, + printf("cirrus: mem_writeb " TARGET_FMT_plx " value 0x%02" PRIu64 "\n", addr, mem_value); #endif } @@ -2594,7 +2594,7 @@ static void cirrus_vga_ioport_write(void *opaque, hwaddr addr, uint64_t val, break; case 0x3c5: #ifdef DEBUG_VGA_REG - printf("vga: write SR%x = 0x%02x\n", s->sr_index, val); + printf("vga: write SR%x = 0x%02" PRIu64 "\n", s->sr_index, val); #endif cirrus_vga_write_sr(c, val); break; @@ -2619,7 +2619,7 @@ static void cirrus_vga_ioport_write(void *opaque, hwaddr addr, uint64_t val, break; case 0x3cf: #ifdef DEBUG_VGA_REG - printf("vga: write GR%x = 0x%02x\n", s->gr_index, val); + printf("vga: write GR%x = 0x%02" PRIu64 "\n", s->gr_index, val); #endif cirrus_vga_write_gr(c, s->gr_index, val); break; @@ -2630,7 +2630,7 @@ static void cirrus_vga_ioport_write(void *opaque, hwaddr addr, uint64_t val, case 0x3b5: case 0x3d5: #ifdef DEBUG_VGA_REG - printf("vga: write CR%x = 0x%02x\n", s->cr_index, val); + printf("vga: write CR%x = 0x%02"PRIu64"\n", s->cr_index, val); #endif cirrus_vga_write_cr(c, val); break; -- 1.8.3.1