[Qemu-devel] [PATCH v2 00/15] TriCore architecture guest implementation

[Bastian Koppelmann <kbastian@mail.uni-paderborn.de>]

Hi,

my aim is to add Infineon's TriCore architecture to QEMU. This series of patches adds the target stubs, a basic testboard and a softmmu for system mode emulation. Furthermore it adds all the 16 bit long instructions of the architecture grouped by opcode format.

After this series of patches. Another one will follow, which adds a lot of the 32 bit long instructions.

All the best

Bastian

Changelog v1 -> v2:
    - Move activation of target patch1->patch4.
    - Remove host related in configure.
    - Remove host related code in user-exec.
    - Remove active_tc struct.
    - Change define GPR first, then CSFR.
    - Fixed QEMU_ARCH_TRICORE using the right number.
    - Add next_pc to DisasContext and change pc calculation.
    - Remove insn_bytes.
    - MASK_BITS_SHIFT uses extract32.
    - Remove MASK_BITS.
    - Add MASK_BITS_SHIFT_SEXT for sign extended masks.
    - Add extra sign extended masks for SB_DISP8/SBC_CONST4/SRC_CONST4
    - helper_shac uses sextract32 for the constant and add len parameter.
    - Replace else case with signed right shift in helper_shac.
    - Remove sign_extend() and use sextract32.
    - Replace branches in OP_COND makro with movcond.
    - Remove gen_cond_mov and use tcg_gen_movcond_tl instead.
    - Remove gen_sh and and change gen_shi to a special case.
    - Moved all SRC/SRR/SSR/SC/SLR/SRO instructions to one decode function.
    - Replace gen_ssov with helper for add_ssov and sub_ssov.
    - Remove AND in ST_B and ST_H instructions.
    - Load/Store instructions now use new TCGMemOp.
    - Replace OP_MEM_INDIRECT with gen_offset_ld/st functions using TCGMemOp.
    - Fill in cdc_increment/cdc_decrement
    - Replace save/restore_context with save/restore_context_upper and save_context_lower
    - Remove CONTEXT_LOWER/UPPER enum.
    - Remove printfs.
    - helper_call uses next_pc instead of pc and insn_bytes.
    - Add gen_goto_tb and replace some tcg_gen_exit_tb with gen_goto_tb
    - Moved SB instructions to one case.
    - Change compare to 0 at instructions JZ_T and JNZ_T.
    - Group SBC instructions to one case.
    - Group SBRN instructions to one case.
    - Change gen_loop() to subtract first and then compare to -1.
    - Change gen_loop() using next_pc insted of insn_bytes.
    - Change SBR_LOOP instructions to use offset * 2 -32.
    - Change cdc_zero using clo32 instead of a loop.
    - Change gen_saturate/_h using movecond instead of a branch.
    - Remove rsubi and use subfi_tl instead.
    - Change SR_JI instruction to use the right mask.
    - Remove BS_STOP on NOP isntruction.
    - Add BS_BRANCH on RFE instruction.
    - Remove BS_STOP of DEBUG instructions.
    - Remove duplicate SSRO instructions.

Bastian Koppelmann (15):
  target-tricore: Add target stubs and qom-cpu
  target-tricore: Add board for systemmode
  target-tricore: Add softmmu support
  target-tricore: Add initialization for translation and activate target
  target-tricore: Add masks and opcodes for decoding
  target-tricore: Add instructions of SRC opcode format
  target-tricore: Add instructions of SRR opcode format
  target-tricore: Add instructions of SSR opcode format
  target-tricore: Add instructions of SRRS and SLRO opcode format
  target-tricore: Add instructions of SB opcode format
  target-tricore: Add instructions of SBC and SBRN opcode format
  target-tricore: Add instructions of SBR opcode format
  target-tricore: Add instructions of SC opcode format
  target-tricore: Add instructions of SLR, SSRO and SRO opcode format
  target-tricore: Add instructions of SR opcode format

 arch_init.c                         |    2 +
 configure                           |    5 +
 cpu-exec.c                          |   11 +-
 cpus.c                              |    6 +
 default-configs/tricore-softmmu.mak |    3 +
 hw/tricore/Makefile.objs            |    1 +
 hw/tricore/tricore_testboard.c      |  130 ++++
 include/elf.h                       |    2 +
 include/hw/tricore/tricore.h        |   54 ++
 include/sysemu/arch_init.h          |    1 +
 target-tricore/Makefile.objs        |    1 +
 target-tricore/cpu-qom.h            |   71 ++
 target-tricore/cpu.c                |  121 +++
 target-tricore/cpu.h                |  372 +++++++++
 target-tricore/helper.c             |   88 +++
 target-tricore/helper.h             |   26 +
 target-tricore/op_helper.c          |  404 ++++++++++
 target-tricore/translate.c          | 1106 +++++++++++++++++++++++++++
 target-tricore/translate_init.c     |   51 ++
 target-tricore/tricore-defs.h       |   28 +
 target-tricore/tricore-opcodes.h    | 1410 +++++++++++++++++++++++++++++++++++
 21 files changed, 3892 insertions(+), 1 deletion(-)
 create mode 100644 default-configs/tricore-softmmu.mak
 create mode 100644 hw/tricore/Makefile.objs
 create mode 100644 hw/tricore/tricore_testboard.c
 create mode 100644 include/hw/tricore/tricore.h
 create mode 100644 target-tricore/Makefile.objs
 create mode 100644 target-tricore/cpu-qom.h
 create mode 100644 target-tricore/cpu.c
 create mode 100644 target-tricore/cpu.h
 create mode 100644 target-tricore/helper.c
 create mode 100644 target-tricore/helper.h
 create mode 100644 target-tricore/op_helper.c
 create mode 100644 target-tricore/translate.c
 create mode 100644 target-tricore/translate_init.c
 create mode 100644 target-tricore/tricore-defs.h
 create mode 100644 target-tricore/tricore-opcodes.h

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2.0.1