From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45314) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XEIiB-00054u-DC for qemu-devel@nongnu.org; Mon, 04 Aug 2014 09:54:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XEIiA-0007dH-AT for qemu-devel@nongnu.org; Mon, 04 Aug 2014 09:54:03 -0400 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:48908) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XEIiA-0006mN-2Q for qemu-devel@nongnu.org; Mon, 04 Aug 2014 09:54:02 -0400 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1XEIhd-0001Au-5p for qemu-devel@nongnu.org; Mon, 04 Aug 2014 14:53:29 +0100 From: Peter Maydell Date: Mon, 4 Aug 2014 14:53:22 +0100 Message-Id: <1407160408-4467-7-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1407160408-4467-1-git-send-email-peter.maydell@linaro.org> References: <1407160408-4467-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PULL 06/12] target-arm: A64: Respect SPSEL when taking exceptions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org From: "Edgar E. Iglesias" Reviewed-by: Alex Bennée Signed-off-by: Edgar E. Iglesias Reviewed-by: Greg Bellows Message-id: 1402994746-8328-4-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell --- target-arm/helper-a64.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c index 2b4ce6a..027434a 100644 --- a/target-arm/helper-a64.c +++ b/target-arm/helper-a64.c @@ -489,8 +489,7 @@ void aarch64_cpu_do_interrupt(CPUState *cs) if (is_a64(env)) { env->banked_spsr[aarch64_banked_spsr_index(1)] = pstate_read(env); - env->sp_el[arm_current_pl(env)] = env->xregs[31]; - env->xregs[31] = env->sp_el[1]; + aarch64_save_sp(env, arm_current_pl(env)); env->elr_el[1] = env->pc; } else { env->banked_spsr[0] = cpsr_read(env); @@ -508,6 +507,7 @@ void aarch64_cpu_do_interrupt(CPUState *cs) pstate_write(env, PSTATE_DAIF | PSTATE_MODE_EL1h); env->aarch64 = 1; + aarch64_restore_sp(env, 1); env->pc = addr; cs->interrupt_request |= CPU_INTERRUPT_EXITTB; -- 1.9.1