From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36983) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XF62D-00077U-Nx for qemu-devel@nongnu.org; Wed, 06 Aug 2014 14:34:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XF627-0001qr-Tf for qemu-devel@nongnu.org; Wed, 06 Aug 2014 14:34:01 -0400 Received: from mail-qa0-x229.google.com ([2607:f8b0:400d:c00::229]:55522) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XF627-0001qm-Os for qemu-devel@nongnu.org; Wed, 06 Aug 2014 14:33:55 -0400 Received: by mail-qa0-f41.google.com with SMTP id j7so2926458qaq.28 for ; Wed, 06 Aug 2014 11:33:55 -0700 (PDT) From: "Gabriel L. Somlo" Date: Wed, 6 Aug 2014 14:07:11 -0400 Message-Id: <1407348431-16648-3-git-send-email-somlo@cmu.edu> In-Reply-To: <1407348431-16648-1-git-send-email-somlo@cmu.edu> References: <1407348431-16648-1-git-send-email-somlo@cmu.edu> Subject: [Qemu-devel] [PATCH 2/2] e1000: use symbolic constants to init phy ctrl & status registers List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: stefanha@redhat.com, mst@redhat.com Signed-off-by: Gabriel Somlo --- hw/net/e1000.c | 29 +++++++++++++++++++++++------ 1 file changed, 23 insertions(+), 6 deletions(-) diff --git a/hw/net/e1000.c b/hw/net/e1000.c index 04c0f91..a2c4608 100644 --- a/hw/net/e1000.c +++ b/hw/net/e1000.c @@ -233,13 +233,30 @@ static const char phy_regcap[0x20] = { /* PHY_ID2 documented in 8254x_GBe_SDM.pdf, pp. 250 */ static const uint16_t phy_reg_init[] = { - [PHY_CTRL] = 0x1140, - [PHY_STATUS] = 0x794d, /* link initially up with not completed autoneg */ - [PHY_ID1] = 0x141, /* [PHY_ID2] configured per DevId, from e1000_reset() */ - [PHY_1000T_CTRL] = 0x0e00, [M88E1000_PHY_SPEC_CTRL] = 0x360, - [M88E1000_EXT_PHY_SPEC_CTRL] = 0x0d60, [PHY_AUTONEG_ADV] = 0xde1, - [PHY_LP_ABILITY] = 0x1e0, [PHY_1000T_STATUS] = 0x3c00, + [PHY_CTRL] = MII_CR_SPEED_SELECT_MSB | + MII_CR_FULL_DUPLEX | + MII_CR_AUTO_NEG_EN, + + [PHY_STATUS] = MII_SR_EXTENDED_CAPS | + MII_SR_LINK_STATUS | /* link initially up */ + MII_SR_AUTONEG_CAPS | + /* MII_SR_AUTONEG_COMPLETE: initially NOT completed */ + MII_SR_PREAMBLE_SUPPRESS | + MII_SR_EXTENDED_STATUS | + MII_SR_10T_HD_CAPS | + MII_SR_10T_FD_CAPS | + MII_SR_100X_HD_CAPS | + MII_SR_100X_FD_CAPS, + + [PHY_ID1] = 0x141, + /* [PHY_ID2] configured per DevId, from e1000_reset() */ + [PHY_AUTONEG_ADV] = 0xde1, + [PHY_LP_ABILITY] = 0x1e0, + [PHY_1000T_CTRL] = 0x0e00, + [PHY_1000T_STATUS] = 0x3c00, + [M88E1000_PHY_SPEC_CTRL] = 0x360, [M88E1000_PHY_SPEC_STATUS] = 0xac00, + [M88E1000_EXT_PHY_SPEC_CTRL] = 0x0d60, }; static const uint32_t mac_reg_init[] = { -- 1.9.3